mx25: add platform code for imx-keypad
Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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cce02464dd
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49535a952b
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@ -217,7 +217,7 @@ static struct clk_lookup lookups[] = {
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_REGISTER_CLOCK("mxc_pwm.1", NULL, pwm2_clk)
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_REGISTER_CLOCK("mxc_pwm.2", NULL, pwm3_clk)
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_REGISTER_CLOCK("mxc_pwm.3", NULL, pwm4_clk)
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_REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk)
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_REGISTER_CLOCK("imx-keypad", NULL, kpp_clk)
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_REGISTER_CLOCK("mx25-adc", NULL, tsc_clk)
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_REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
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_REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
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@ -515,3 +515,23 @@ struct platform_device mxc_wdt = {
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.num_resources = ARRAY_SIZE(mxc_wdt_resources),
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.resource = mxc_wdt_resources,
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};
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static struct resource mx25_kpp_resources[] = {
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{
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.start = MX25_KPP_BASE_ADDR,
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.end = MX25_KPP_BASE_ADDR + 0xf,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = MX25_INT_KPP,
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.end = MX25_INT_KPP,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mx25_kpp_device = {
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.name = "imx-keypad",
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.id = -1,
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.num_resources = ARRAY_SIZE(mx25_kpp_resources),
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.resource = mx25_kpp_resources,
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};
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@ -22,3 +22,4 @@ extern struct platform_device mxc_nand_device;
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extern struct platform_device mx25_rtc_device;
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extern struct platform_device mx25_fb_device;
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extern struct platform_device mxc_wdt;
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extern struct platform_device mx25_kpp_device;
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@ -371,30 +371,33 @@
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#define MX25_PAD_SD1_DATA3__FEC_CRS IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTRL)
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#define MX25_PAD_SD1_DATA3__GPIO_2_28 IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL)
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#define MX25_PAD_KPP_ROW0__KPP_ROW0 IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, PAD_CTL_PKE)
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#define KPP_CTL_ROW (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
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#define KPP_CTL_COL (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
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#define MX25_PAD_KPP_ROW0__KPP_ROW0 IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, KPP_CTL_ROW)
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#define MX25_PAD_KPP_ROW0__GPIO_2_29 IOMUX_PAD(0x3a0, 0x1a8, 0x15, 0, 0, NO_PAD_CTRL)
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#define MX25_PAD_KPP_ROW1__KPP_ROW1 IOMUX_PAD(0x3a4, 0x1ac, 0x10, 0, 0, PAD_CTL_PKE)
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#define MX25_PAD_KPP_ROW1__KPP_ROW1 IOMUX_PAD(0x3a4, 0x1ac, 0x10, 0, 0, KPP_CTL_ROW)
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#define MX25_PAD_KPP_ROW1__GPIO_2_30 IOMUX_PAD(0x3a4, 0x1ac, 0x15, 0, 0, NO_PAD_CTRL)
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#define MX25_PAD_KPP_ROW2__KPP_ROW2 IOMUX_PAD(0x3a8, 0x1b0, 0x10, 0, 0, PAD_CTL_PKE)
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#define MX25_PAD_KPP_ROW2__KPP_ROW2 IOMUX_PAD(0x3a8, 0x1b0, 0x10, 0, 0, KPP_CTL_ROW)
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#define MX25_PAD_KPP_ROW2__CSI_D0 IOMUX_PAD(0x3a8, 0x1b0, 0x13, 0x488, 2, NO_PAD_CTRL)
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#define MX25_PAD_KPP_ROW2__GPIO_2_31 IOMUX_PAD(0x3a8, 0x1b0, 0x15, 0, 0, NO_PAD_CTRL)
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#define MX25_PAD_KPP_ROW3__KPP_ROW3 IOMUX_PAD(0x3ac, 0x1b4, 0x10, 0, 0, PAD_CTL_PKE)
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#define MX25_PAD_KPP_ROW3__KPP_ROW3 IOMUX_PAD(0x3ac, 0x1b4, 0x10, 0, 0, KPP_CTL_ROW)
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#define MX25_PAD_KPP_ROW3__CSI_LD1 IOMUX_PAD(0x3ac, 0x1b4, 0x13, 0x48c, 2, NO_PAD_CTRL)
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#define MX25_PAD_KPP_ROW3__GPIO_3_0 IOMUX_PAD(0x3ac, 0x1b4, 0x15, 0, 0, NO_PAD_CTRL)
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#define MX25_PAD_KPP_COL0__KPP_COL0 IOMUX_PAD(0x3b0, 0x1b8, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE)
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#define MX25_PAD_KPP_COL0__KPP_COL0 IOMUX_PAD(0x3b0, 0x1b8, 0x10, 0, 0, KPP_CTL_COL)
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#define MX25_PAD_KPP_COL0__GPIO_3_1 IOMUX_PAD(0x3b0, 0x1b8, 0x15, 0, 0, NO_PAD_CTRL)
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#define MX25_PAD_KPP_COL1__KPP_COL1 IOMUX_PAD(0x3b4, 0x1bc, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE)
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#define MX25_PAD_KPP_COL1__KPP_COL1 IOMUX_PAD(0x3b4, 0x1bc, 0x10, 0, 0, KPP_CTL_COL)
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#define MX25_PAD_KPP_COL1__GPIO_3_2 IOMUX_PAD(0x3b4, 0x1bc, 0x15, 0, 0, NO_PAD_CTRL)
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#define MX25_PAD_KPP_COL2__KPP_COL2 IOMUX_PAD(0x3b8, 0x1c0, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE)
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#define MX25_PAD_KPP_COL2__KPP_COL2 IOMUX_PAD(0x3b8, 0x1c0, 0x10, 0, 0, KPP_CTL_COL)
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#define MX25_PAD_KPP_COL2__GPIO_3_3 IOMUX_PAD(0x3b8, 0x1c0, 0x15, 0, 0, NO_PAD_CTRL)
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#define MX25_PAD_KPP_COL3__KPP_COL3 IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE)
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#define MX25_PAD_KPP_COL3__KPP_COL3 IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, KPP_CTL_COL)
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#define MX25_PAD_KPP_COL3__GPIO_3_4 IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL)
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#define MX25_PAD_FEC_MDC__FEC_MDC IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL)
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@ -34,11 +34,13 @@
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#define MX25_NFC_BASE_ADDR 0xbb000000
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#define MX25_DRYICE_BASE_ADDR 0x53ffc000
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#define MX25_LCDC_BASE_ADDR 0x53fbc000
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#define MX25_KPP_BASE_ADDR 0x43fa8000
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#define MX25_INT_DRYICE 25
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#define MX25_INT_FEC 57
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#define MX25_INT_NANDFC 33
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#define MX25_INT_LCDC 39
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#define MX25_INT_KPP 24
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#if defined(IMX_NEEDS_DEPRECATED_SYMBOLS)
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#define UART1_BASE_ADDR MX25_UART1_BASE_ADDR
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