dmaengine: xilinx_dma: Increase AXI DMA transaction segment count
Increase AXI DMA transaction segments count to ensure that even in high load we always get a free segment in prepare descriptor for a DMA_SLAVE transaction. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Link: https://lore.kernel.org/r/1691387509-2113129-5-git-send-email-radhey.shyam.pandey@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
parent
d8a3f65f6c
commit
491e9d4096
|
@ -178,7 +178,7 @@
|
|||
#define XILINX_DMA_BD_SOP BIT(27)
|
||||
#define XILINX_DMA_BD_EOP BIT(26)
|
||||
#define XILINX_DMA_COALESCE_MAX 255
|
||||
#define XILINX_DMA_NUM_DESCS 255
|
||||
#define XILINX_DMA_NUM_DESCS 512
|
||||
#define XILINX_DMA_NUM_APP_WORDS 5
|
||||
|
||||
/* AXI CDMA Specific Registers/Offsets */
|
||||
|
|
Loading…
Reference in New Issue