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drm/amdgpu: fix GFX10 missing CSIB set(v3) 

still need to init csb even for SRIOV

v2:
drop init_pg() for gfx10 at all since
PG and GFX off feature will be fully controled
by RLC and SMU fw for gfx10

v3:
drop the flush_gpu_tlb lines since we consider
it is only usefull in emulation

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Monk Liu 2019-11-26 19:33:38 +08:00 committed by Alex Deucher
parent cd05b51aaa
commit 4905880b45
1 changed files with 5 additions and 28 deletions
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33
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
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@ -1768,22 +1768,6 @@ static int gfx_v10_0_init_csb(struct amdgpu_device *adev)
return 0;
}
static int gfx_v10_0_init_pg(struct amdgpu_device *adev)
{
int i;
int r;
r = gfx_v10_0_init_csb(adev);
if (r)
return r;
for (i = 0; i < adev->num_vmhubs; i++)
amdgpu_gmc_flush_gpu_tlb(adev, 0, i, 0);
/* TODO: init power gating */
return 0;
}
void gfx_v10_0_rlc_stop(struct amdgpu_device *adev)
{
u32 tmp = RREG32_SOC15(GC, 0, mmRLC_CNTL);
@ -1876,21 +1860,16 @@ static int gfx_v10_0_rlc_resume(struct amdgpu_device *adev)
{
int r;
if (amdgpu_sriov_vf(adev))
return 0;
if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
r = gfx_v10_0_wait_for_rlc_autoload_complete(adev);
if (r)
return r;
r = gfx_v10_0_init_pg(adev);
if (r)
return r;
/* enable RLC SRM */
gfx_v10_0_rlc_enable_srm(adev);
gfx_v10_0_init_csb(adev);
if (!amdgpu_sriov_vf(adev)) /* enable RLC SRM */
gfx_v10_0_rlc_enable_srm(adev);
} else {
adev->gfx.rlc.funcs->stop(adev);
@ -1912,9 +1891,7 @@ static int gfx_v10_0_rlc_resume(struct amdgpu_device *adev)
return r;
}
r = gfx_v10_0_init_pg(adev);
if (r)
return r;
gfx_v10_0_init_csb(adev);
adev->gfx.rlc.funcs->start(adev);