drm/amdgpu: assign VM invalidation engine manually v2
For Vega10 we have 18 VM invalidation engines for each VMHUB. Start to assign them manually to the rings. v2: add a BUG_ON if we use to many engines Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -179,6 +179,7 @@ struct amdgpu_ring {
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unsigned cond_exe_offs;
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u64 cond_exe_gpu_addr;
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volatile u32 *cond_exe_cpu_addr;
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unsigned vm_inv_eng;
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#if defined(CONFIG_DEBUG_FS)
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struct dentry *ent;
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#endif
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@ -2959,7 +2959,7 @@ static void gfx_v9_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
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struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
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int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);
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uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
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unsigned eng = ring->idx;
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unsigned eng = ring->vm_inv_eng;
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pd_addr = pd_addr | 0x1; /* valid bit */
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/* now only use physical base address of PDE and valid */
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@ -386,6 +386,22 @@ static int gmc_v9_0_early_init(void *handle)
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static int gmc_v9_0_late_init(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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unsigned vm_inv_eng[AMDGPU_MAX_VMHUBS] = { 0 };
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unsigned i;
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for(i = 0; i < adev->num_rings; ++i) {
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struct amdgpu_ring *ring = adev->rings[i];
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unsigned vmhub = ring->funcs->vmhub;
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ring->vm_inv_eng = vm_inv_eng[vmhub]++;
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dev_info(adev->dev, "ring %u uses VM inv eng %u on hub %u\n",
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ring->idx, ring->vm_inv_eng, ring->funcs->vmhub);
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}
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/* Engine 17 is used for GART flushes */
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for(i = 0; i < AMDGPU_MAX_VMHUBS; ++i)
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BUG_ON(vm_inv_eng[i] > 17);
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return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
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}
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@ -1041,7 +1041,7 @@ static void sdma_v4_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
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{
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struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
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uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
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unsigned eng = ring->idx;
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unsigned eng = ring->vm_inv_eng;
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pd_addr = pd_addr | 0x1; /* valid bit */
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/* now only use physical base address of PDE and valid */
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@ -1037,7 +1037,7 @@ static void uvd_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
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struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
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uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
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uint32_t data0, data1, mask;
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unsigned eng = ring->idx;
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unsigned eng = ring->vm_inv_eng;
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pd_addr = pd_addr | 0x1; /* valid bit */
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/* now only use physical base address of PDE and valid */
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@ -1078,7 +1078,7 @@ static void uvd_v7_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
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{
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struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
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uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
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unsigned eng = ring->idx;
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unsigned eng = ring->vm_inv_eng;
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pd_addr = pd_addr | 0x1; /* valid bit */
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/* now only use physical base address of PDE and valid */
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@ -970,7 +970,7 @@ static void vce_v4_0_emit_vm_flush(struct amdgpu_ring *ring,
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{
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struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
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uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
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unsigned eng = ring->idx;
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unsigned eng = ring->vm_inv_eng;
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pd_addr = pd_addr | 0x1; /* valid bit */
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/* now only use physical base address of PDE and valid */
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