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pinctrl: renesas: checker: Check drive pin conflicts 

Check that there is only a single entry for each pin with drive strength
capabilities.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/382206e737710afd3059abe75bc41e324823e657.1640270559.git.geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven 2021-12-23 15:56:26 +01:00
parent 6bfbaec7de
commit 4704797eb2
1 changed files with 20 additions and 2 deletions
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22
drivers/pinctrl/renesas/core.c
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@ -1154,8 +1154,26 @@ static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info)
sh_pfc_check_cfg_reg(drvname, &info->cfg_regs[i]);
/* Check drive strength registers */
for (i = 0; info->drive_regs && info->drive_regs[i].reg; i++)
sh_pfc_check_drive_reg(info, &info->drive_regs[i]);
for (i = 0; drive_regs && drive_regs[i].reg; i++)
sh_pfc_check_drive_reg(info, &drive_regs[i]);
for (i = 0; drive_regs && drive_regs[i / 8].reg; i++) {
if (!drive_regs[i / 8].fields[i % 8].pin &&
!drive_regs[i / 8].fields[i % 8].offset &&
!drive_regs[i / 8].fields[i % 8].size)
continue;
for (j = 0; j < i; j++) {
if (drive_regs[i / 8].fields[i % 8].pin ==
drive_regs[j / 8].fields[j % 8].pin &&
drive_regs[j / 8].fields[j % 8].offset &&
drive_regs[j / 8].fields[j % 8].size) {
sh_pfc_err("drive_reg 0x%x:%u/0x%x:%u: pin conflict\n",
drive_regs[i / 8].reg, i % 8,
drive_regs[j / 8].reg, j % 8);
}
}
}
/* Check bias registers */
for (i = 0; bias_regs && (bias_regs[i].puen || bias_regs[i].pud); i++)