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Revert "parisc: Drop LDCW barrier in CAS code when running UP" 

This reverts commit e6eb5fe912.
We need to optimize it differently. A follow up patch will correct it.

Signed-off-by: Helge Deller <deller@gmx.de>
Cc: <stable@vger.kernel.org> # v5.2+
This commit is contained in:
Helge Deller 2020-07-28 18:52:58 +02:00
parent 3d05b8aebc
commit 462fb756c7
1 changed files with 4 additions and 8 deletions
arch/parisc/kernel
syscall.S

12
arch/parisc/kernel/syscall.S
View File

@ -641,8 +641,7 @@ cas_action:
2: stw %r24, 0(%r26) 2: stw %r24, 0(%r26)
/* Free lock */ /* Free lock */
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
98: LDCW 0(%sr2,%r20), %r1 /* Barrier */ LDCW 0(%sr2,%r20), %r1 /* Barrier */
99: ALTERNATIVE(98b, 99b, ALT_COND_NO_SMP, INSN_NOP)
#endif #endif
stw %r20, 0(%sr2,%r20) stw %r20, 0(%sr2,%r20)
#if ENABLE_LWS_DEBUG #if ENABLE_LWS_DEBUG
@ -659,8 +658,7 @@ cas_action:
/* Error occurred on load or store */ /* Error occurred on load or store */
/* Free lock */ /* Free lock */
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
98: LDCW 0(%sr2,%r20), %r1 /* Barrier */ LDCW 0(%sr2,%r20), %r1 /* Barrier */
99: ALTERNATIVE(98b, 99b, ALT_COND_NO_SMP, INSN_NOP)
#endif #endif
stw %r20, 0(%sr2,%r20) stw %r20, 0(%sr2,%r20)
#if ENABLE_LWS_DEBUG #if ENABLE_LWS_DEBUG
@ -864,8 +862,7 @@ cas2_action:
cas2_end: cas2_end:
/* Free lock */ /* Free lock */
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
98: LDCW 0(%sr2,%r20), %r1 /* Barrier */ LDCW 0(%sr2,%r20), %r1 /* Barrier */
99: ALTERNATIVE(98b, 99b, ALT_COND_NO_SMP, INSN_NOP)
#endif #endif
stw %r20, 0(%sr2,%r20) stw %r20, 0(%sr2,%r20)
/* Enable interrupts */ /* Enable interrupts */
@ -878,8 +875,7 @@ cas2_end:
/* Error occurred on load or store */ /* Error occurred on load or store */
/* Free lock */ /* Free lock */
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
98: LDCW 0(%sr2,%r20), %r1 /* Barrier */ LDCW 0(%sr2,%r20), %r1 /* Barrier */
99: ALTERNATIVE(98b, 99b, ALT_COND_NO_SMP, INSN_NOP)
#endif #endif
stw %r20, 0(%sr2,%r20) stw %r20, 0(%sr2,%r20)
ssm PSW_SM_I, %r0 ssm PSW_SM_I, %r0