Few more omap fixes that are not regressions or oopses and can
wait for the merge window. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.15 (GNU/Linux) iQIcBAABAgAGBQJSZ5QdAAoJEBvUPslcq6VzYjwQAKvzhTaA8yI3fKr7HYSGAfao lxHPaLMJORTCizyH/EUDSS0k2yDH8otIhyx1quQuC51Vk64vXxE1XXdsaPCy1t8B e+bWwAh51NgKJbSKDw+ZkNzSxePNmo+dRRCb6o5NQOgXuDqEwuyhZLaIS+7xVinw DSoKjU79bWexCZUEgHYAw/zi0KHRjro/FLrsiazcZt5zucijBjhBpvlyXik9Knpr nOZPUqeJd8ZXgEMqwPNiQDxYhIJNQVoHhF+upExU4bKOBMfTJDEqdoO344C6YyPn uzpYiHSSMdCfFi5Ahz1ZA/yYRo/9RqGdTFPIe0kL5Hk8vRxk5HZLUOeH+BFORudg ZvDURckFCDS7rwKvS4KVu28lr1sK36qDugdxYr1XN4RTNW6pmnf3GSuaHvd9BpaU UpMwENhR0JH5bG4McVTwKln6ogaqE0rbd+33QnPrsO3w+268sVbeiYhg5Dc3A5HO p2qKBWVlJevxLbUBnvFHpyrIn47LxFypl6pdlT+nh1UMjvW/zw1KGQcMONxGPUg9 mZu9WG/qqgS/n+bekm0WB6e4bpkvRg9JzxFNQTJlvS3tCI+JG20eNN3u3JljOGER ngqPRQQ0e4FOZfZ1h/ejfrUjxOye+GzeeVgdtfOyUlrgGeLSHfWyZQo5vfER0EoV SIkm+t9gSHupqrlV5Q6X =WhmE -----END PGP SIGNATURE----- Merge tag 'omap-for-v3.13/fixes-not-urgent-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes-non-critical From Tony Lindgren: Few more omap fixes that are not regressions or oopses and can wait for the merge window. * tag 'omap-for-v3.13/fixes-not-urgent-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: irq, AM33XX add missing register check ARM: OMAP2+: wakeupgen: AM43x adaptation Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
462fb38f3d
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@ -233,7 +233,7 @@ static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs
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goto out;
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irqnr = readl_relaxed(base_addr + 0xd8);
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#ifdef CONFIG_SOC_TI81XX
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#if IS_ENABLED(CONFIG_SOC_TI81XX) || IS_ENABLED(CONFIG_SOC_AM33XX)
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if (irqnr)
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goto out;
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irqnr = readl_relaxed(base_addr + 0xf8);
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@ -33,8 +33,12 @@
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#include "omap4-sar-layout.h"
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#include "common.h"
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#define MAX_NR_REG_BANKS 5
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#define MAX_IRQS 160
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#define AM43XX_NR_REG_BANKS 7
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#define AM43XX_IRQS 224
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#define MAX_NR_REG_BANKS AM43XX_NR_REG_BANKS
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#define MAX_IRQS AM43XX_IRQS
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#define DEFAULT_NR_REG_BANKS 5
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#define DEFAULT_IRQS 160
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#define WKG_MASK_ALL 0x00000000
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#define WKG_UNMASK_ALL 0xffffffff
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#define CPU_ENA_OFFSET 0x400
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@ -47,8 +51,8 @@ static void __iomem *wakeupgen_base;
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static void __iomem *sar_base;
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static DEFINE_RAW_SPINLOCK(wakeupgen_lock);
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static unsigned int irq_target_cpu[MAX_IRQS];
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static unsigned int irq_banks = MAX_NR_REG_BANKS;
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static unsigned int max_irqs = MAX_IRQS;
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static unsigned int irq_banks = DEFAULT_NR_REG_BANKS;
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static unsigned int max_irqs = DEFAULT_IRQS;
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static unsigned int omap_secure_apis;
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/*
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@ -418,12 +422,16 @@ int __init omap_wakeupgen_init(void)
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irq_banks = OMAP4_NR_BANKS;
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max_irqs = OMAP4_NR_IRQS;
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omap_secure_apis = 1;
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} else if (soc_is_am43xx()) {
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irq_banks = AM43XX_NR_REG_BANKS;
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max_irqs = AM43XX_IRQS;
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}
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/* Clear all IRQ bitmasks at wakeupGen level */
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for (i = 0; i < irq_banks; i++) {
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wakeupgen_writel(0, i, CPU0_ID);
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wakeupgen_writel(0, i, CPU1_ID);
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if (!soc_is_am43xx())
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wakeupgen_writel(0, i, CPU1_ID);
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}
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/*
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