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OpenCloudOS-Kernel
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mailbox: pcc: Drop handling invalid bit-width in {read,write}_register 

pcc_chan_reg_init now checks if the register bit width is within the
list [8, 16, 32, 64] and flags error if that is not the case. Therefore
there is no need to handling invalid bit-width in both read_register
and write_register. We can drop that along with the return values for
these 2 functions.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
This commit is contained in:
Sudeep Holla 2021-09-17 14:33:54 +01:00 committed by Jassi Brar
parent bf18123e78
commit 45ec2dafb1
1 changed files with 4 additions and 20 deletions
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24
drivers/mailbox/pcc.c
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@ -110,10 +110,8 @@ static struct mbox_controller pcc_mbox_ctrl = {};
* The below read_register and write_registers are used to read and * The below read_register and write_registers are used to read and
* write from perf critical registers such as PCC doorbell register * write from perf critical registers such as PCC doorbell register
*/ */
static int read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width) static void read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width)
{ {
int ret_val = 0;
switch (bit_width) { switch (bit_width) {
case 8: case 8:
*val = readb(vaddr); *val = readb(vaddr);
@ -127,19 +125,11 @@ static int read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width)
case 64: case 64:
*val = readq(vaddr); *val = readq(vaddr);
break; break;
default:
pr_debug("Error: Cannot read register of %u bit width",
bit_width);
ret_val = -EFAULT;
break;
} }
return ret_val;
} }
static int write_register(void __iomem *vaddr, u64 val, unsigned int bit_width) static void write_register(void __iomem *vaddr, u64 val, unsigned int bit_width)
{ {
int ret_val = 0;
switch (bit_width) { switch (bit_width) {
case 8: case 8:
writeb(val, vaddr); writeb(val, vaddr);
@ -153,13 +143,7 @@ static int write_register(void __iomem *vaddr, u64 val, unsigned int bit_width)
case 64: case 64:
writeq(val, vaddr); writeq(val, vaddr);
break; break;
default:
pr_debug("Error: Cannot write register of %u bit width",
bit_width);
ret_val = -EFAULT;
break;
} }
return ret_val;
} }
static int pcc_chan_reg_read(struct pcc_chan_reg *reg, u64 *val) static int pcc_chan_reg_read(struct pcc_chan_reg *reg, u64 *val)
@ -172,7 +156,7 @@ static int pcc_chan_reg_read(struct pcc_chan_reg *reg, u64 *val)
} }
if (reg->vaddr) if (reg->vaddr)
ret = read_register(reg->vaddr, val, reg->gas->bit_width); read_register(reg->vaddr, val, reg->gas->bit_width);
else else
ret = acpi_read(val, reg->gas); ret = acpi_read(val, reg->gas);
@ -187,7 +171,7 @@ static int pcc_chan_reg_write(struct pcc_chan_reg *reg, u64 val)
return 0; return 0;
if (reg->vaddr) if (reg->vaddr)
ret = write_register(reg->vaddr, val, reg->gas->bit_width); write_register(reg->vaddr, val, reg->gas->bit_width);
else else
ret = acpi_write(val, reg->gas); ret = acpi_write(val, reg->gas);