PCI: rockchip: Fix negotiated lanes calculation
The calculation of negotiated lanes is wrong: it should be shifted by
PCIE_CORE_PL_CONF_LANE_SHIFT, but it is shifted by
PCIE_CORE_PL_CONF_LANE_MASK instead. Let's fix it.
Fixes: e77f847df5
("PCI: rockchip: Add Rockchip PCIe controller support")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -636,8 +636,8 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
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/* Check the final link width from negotiated lane counter from MGMT */
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status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL);
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status = 0x1 << ((status & PCIE_CORE_PL_CONF_LANE_MASK) >>
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PCIE_CORE_PL_CONF_LANE_MASK);
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status = 0x1 << ((status & PCIE_CORE_PL_CONF_LANE_MASK) >>
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PCIE_CORE_PL_CONF_LANE_SHIFT);
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dev_dbg(dev, "current link width is x%d\n", status);
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rockchip_pcie_write(rockchip, ROCKCHIP_VENDOR_ID,
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