s390/qeth: use qeth_setup_ccw() to set up all CCWs
Re-work the helper a little bit, so that it can be used for all CCWs that qeth issues. Signed-off-by: Julian Wiedmann <jwi@linux.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -235,6 +235,8 @@ static inline int qeth_is_ipa_enabled(struct qeth_ipa_info *ipa,
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#define QETH_IDX_FUNC_LEVEL_IQD 0x4108
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#define QETH_BUFSIZE 4096
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#define CCW_CMD_WRITE 0x01
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#define CCW_CMD_READ 0x02
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/**
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* some more defs
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@ -65,7 +65,6 @@ static struct mutex qeth_mod_mutex;
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static void qeth_send_control_data_cb(struct qeth_channel *,
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struct qeth_cmd_buffer *);
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static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
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static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
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static void qeth_free_buffer_pool(struct qeth_card *);
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static int qeth_qdio_establish(struct qeth_card *);
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static void qeth_free_qdio_buffers(struct qeth_card *);
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@ -532,6 +531,14 @@ static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
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queue == card->qdio.no_in_queues - 1;
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}
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static void qeth_setup_ccw(struct ccw1 *ccw, u8 cmd_code, u32 len, void *data)
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{
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ccw->cmd_code = cmd_code;
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ccw->flags = CCW_FLAG_SLI;
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ccw->count = len;
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ccw->cda = (__u32) __pa(data);
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}
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static int __qeth_issue_next_read(struct qeth_card *card)
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{
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struct qeth_channel *channel = &card->read;
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@ -549,7 +556,7 @@ static int __qeth_issue_next_read(struct qeth_card *card)
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"available\n", dev_name(&card->gdev->dev));
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return -ENOMEM;
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}
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qeth_setup_ccw(channel, iob->data, QETH_BUFSIZE);
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qeth_setup_ccw(&channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
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QETH_CARD_TEXT(card, 6, "noirqpnd");
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rc = ccw_device_start(channel->ccwdev, &channel->ccw,
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(addr_t) iob, 0, 0);
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@ -745,21 +752,6 @@ static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
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return card;
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}
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static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
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__u32 len)
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{
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struct qeth_card *card;
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card = CARD_FROM_CDEV(channel->ccwdev);
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QETH_CARD_TEXT(card, 4, "setupccw");
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if (channel == &card->read)
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memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
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else
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memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
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channel->ccw.count = len;
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channel->ccw.cda = (__u32) __pa(iob);
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}
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static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
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{
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__u8 index;
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@ -1680,10 +1672,7 @@ static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
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if (!rcd_buf)
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return -ENOMEM;
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channel->ccw.cmd_code = ciw->cmd;
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channel->ccw.cda = (__u32) __pa(rcd_buf);
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channel->ccw.count = ciw->count;
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channel->ccw.flags = CCW_FLAG_SLI;
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qeth_setup_ccw(&channel->ccw, ciw->cmd, ciw->count, rcd_buf);
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channel->state = CH_STATE_RCD;
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spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
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ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
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@ -1857,9 +1846,7 @@ static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
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if (!iob)
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return -ENOMEM;
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iob->callback = idx_reply_cb;
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memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
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channel->ccw.count = QETH_BUFSIZE;
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channel->ccw.cda = (__u32) __pa(iob->data);
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qeth_setup_ccw(&channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
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wait_event(card->wait_q,
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atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
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@ -1908,9 +1895,8 @@ static int qeth_idx_activate_channel(struct qeth_channel *channel,
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if (!iob)
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return -ENOMEM;
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iob->callback = idx_reply_cb;
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memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
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channel->ccw.count = IDX_ACTIVATE_SIZE;
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channel->ccw.cda = (__u32) __pa(iob->data);
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qeth_setup_ccw(&channel->ccw, CCW_CMD_WRITE, IDX_ACTIVATE_SIZE,
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iob->data);
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if (channel == &card->write) {
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memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
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memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
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@ -2070,7 +2056,7 @@ out:
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void qeth_prepare_control_data(struct qeth_card *card, int len,
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struct qeth_cmd_buffer *iob)
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{
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qeth_setup_ccw(iob->channel, iob->data, len);
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qeth_setup_ccw(&iob->channel->ccw, CCW_CMD_WRITE, len, iob->data);
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iob->callback = qeth_release_buffer;
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memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
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@ -146,17 +146,6 @@ unsigned char IPA_PDU_HEADER[] = {
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};
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EXPORT_SYMBOL_GPL(IPA_PDU_HEADER);
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unsigned char WRITE_CCW[] = {
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0x01, CCW_FLAG_SLI, 0, 0,
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0, 0, 0, 0
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};
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unsigned char READ_CCW[] = {
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0x02, CCW_FLAG_SLI, 0, 0,
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0, 0, 0, 0
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};
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struct ipa_rc_msg {
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enum qeth_ipa_return_codes rc;
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char *msg;
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@ -818,10 +818,6 @@ extern char *qeth_get_ipa_cmd_name(enum qeth_ipa_cmds cmd);
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/* END OF IP Assist related definitions */
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/*****************************************************************************/
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extern unsigned char WRITE_CCW[];
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extern unsigned char READ_CCW[];
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extern unsigned char CM_ENABLE[];
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#define CM_ENABLE_SIZE 0x63
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#define QETH_CM_ENABLE_ISSUER_RM_TOKEN(buffer) (buffer + 0x2c)
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