ide: hpt366: fix incorrect mask when checking at cmd_high_time

According to the HPT366 data sheet, PCI config space dword 0x40-0x43
bits 11:8 specify the primary drive cmd_high_time, however,
currently just 3 bits of the 4 are being used because the mask
is 0x07 and not 0x0f.  Fix the mask, allowing for the 40MHz clock
to be detected.

Also add in missing space between switch and parenthesis to clean
up a checkpatch warning.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Colin Ian King 2016-07-12 11:59:39 +01:00 committed by David S. Miller
parent 79f18a0637
commit 45969e16f9
1 changed files with 1 additions and 1 deletions

View File

@ -1012,7 +1012,7 @@ static int init_chipset_hpt366(struct pci_dev *dev)
pci_read_config_dword(dev, 0x40, &itr1); pci_read_config_dword(dev, 0x40, &itr1);
/* Detect PCI clock by looking at cmd_high_time. */ /* Detect PCI clock by looking at cmd_high_time. */
switch((itr1 >> 8) & 0x07) { switch ((itr1 >> 8) & 0x0f) {
case 0x09: case 0x09:
pci_clk = 40; pci_clk = 40;
break; break;