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drm/omap: omap_display_timings: rename vbp to vback_porch 

In preparation to move the stack to use the generic videmode struct for
display timing information rename the vbp member to vback_porch.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Peter Ujfalusi 2016-09-22 14:06:53 +03:00 committed by Tomi Valkeinen
parent 0996c68e1b
commit 458540c606
18 changed files with 33 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
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@ -38,7 +38,7 @@ static const struct omap_video_timings tvc_pal_timings = {
.hback_porch = 68,
.vsync_len = 5,
.vfront_porch = 5,
.vbp = 41,
.vback_porch = 41,
.interlace = true,
};

2
drivers/gpu/drm/omapdrm/displays/connector-dvi.c
View File

@ -31,7 +31,7 @@ static const struct omap_video_timings dvic_default_timings = {
.vfront_porch = 3,
.vsync_len = 4,
.vbp = 7,
.vback_porch = 7,
.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH,
.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH,

2
drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
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@ -30,7 +30,7 @@ static const struct omap_video_timings hdmic_default_timings = {
.hback_porch = 48,
.vsync_len = 2,
.vfront_porch = 11,
.vbp = 31,
.vback_porch = 31,
.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,

2
drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
View File

@ -31,7 +31,7 @@ static struct omap_video_timings lb035q02_timings = {
.vsync_len = 2,
.vfront_porch = 4,
.vbp = 18,
.vback_porch = 18,
.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,

2
drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
View File

@ -74,7 +74,7 @@ static const struct omap_video_timings nec_8048_panel_timings = {
.hback_porch = 4,
.vfront_porch = 3,
.vsync_len = 1,
.vbp = 4,
.vback_porch = 4,
.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,

2
drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
View File

@ -47,7 +47,7 @@ static const struct omap_video_timings sharp_ls_timings = {
.vsync_len = 1,
.vfront_porch = 1,
.vbp = 1,
.vback_porch = 1,
.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,

2
drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
View File

@ -101,7 +101,7 @@ static const struct omap_video_timings acx565akm_panel_timings = {
.hback_porch = 24,
.vfront_porch = 3,
.vsync_len = 3,
.vbp = 4,
.vback_porch = 4,
.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,

2
drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c
View File

@ -51,7 +51,7 @@ static struct omap_video_timings td028ttec1_panel_timings = {
.hback_porch = 8,
.vfront_porch = 4,
.vsync_len = 2,
.vbp = 2,
.vback_porch = 2,
.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,

2
drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c
View File

@ -84,7 +84,7 @@ static const struct omap_video_timings tpo_td043_timings = {
.vsync_len = 1,
.vfront_porch = 39,
.vbp = 34,
.vback_porch = 34,
.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,

15
drivers/gpu/drm/omapdrm/dss/dispc.c
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@ -2870,7 +2870,7 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi,
int wbdelay;
wbdelay = min(mgr_timings->vfront_porch +
mgr_timings->vsync_len + mgr_timings->vbp, 255);
mgr_timings->vsync_len + mgr_timings->vback_porch, 255);
/* WBDELAYCOUNT */
REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), wbdelay, 7, 0);
@ -3134,7 +3134,7 @@ bool dispc_mgr_timings_ok(enum omap_channel channel,
if (!_dispc_lcd_timings_ok(timings->hsync_len,
timings->hfront_porch, timings->hback_porch,
timings->vsync_len, timings->vfront_porch,
timings->vbp))
timings->vback_porch))
return false;
}
@ -3270,13 +3270,14 @@ void dispc_mgr_set_timings(enum omap_channel channel,
}
if (dss_mgr_is_lcd(channel)) {
_dispc_mgr_set_lcd_timings(channel, t.hsync_len, t.hfront_porch,
t.hback_porch, t.vsync_len, t.vfront_porch, t.vbp,
_dispc_mgr_set_lcd_timings(channel,
t.hsync_len, t.hfront_porch, t.hback_porch,
t.vsync_len, t.vfront_porch, t.vback_porch,
t.vsync_level, t.hsync_level, t.data_pclk_edge,
t.de_level, t.sync_pclk_edge);
xtot = t.hactive + t.hfront_porch + t.hsync_len + t.hback_porch;
ytot = t.vactive + t.vfront_porch + t.vsync_len + t.vbp;
ytot = t.vactive + t.vfront_porch + t.vsync_len + t.vback_porch;
ht = timings->pixelclock / xtot;
vt = timings->pixelclock / xtot / ytot;
@ -3284,7 +3285,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
DSSDBG("pck %u\n", timings->pixelclock);
DSSDBG("hsync_len %d hfp %d hbp %d vsw %d vfp %d vbp %d\n",
t.hsync_len, t.hfront_porch, t.hback_porch,
t.vsync_len, t.vfront_porch, t.vbp);
t.vsync_len, t.vfront_porch, t.vback_porch);
DSSDBG("vsync_level %d hsync_level %d data_pclk_edge %d de_level %d sync_pclk_edge %d\n",
t.vsync_level, t.hsync_level, t.data_pclk_edge,
t.de_level, t.sync_pclk_edge);
@ -4228,7 +4229,7 @@ static const struct dispc_errata_i734_data {
.hactive = 8, .vactive = 1,
.pixelclock = 16000000,
.hsync_len = 8, .hfront_porch = 4, .hback_porch = 4,
.vsync_len = 1, .vfront_porch = 1, .vbp = 1,
.vsync_len = 1, .vfront_porch = 1, .vback_porch = 1,
.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.interlace = false,

4
drivers/gpu/drm/omapdrm/dss/display.c
View File

@ -229,7 +229,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm,
ovt->hfront_porch = vm->hfront_porch;
ovt->hsync_len = vm->hsync_len;
ovt->vactive = vm->vactive;
ovt->vbp = vm->vback_porch;
ovt->vback_porch = vm->vback_porch;
ovt->vfront_porch = vm->vfront_porch;
ovt->vsync_len = vm->vsync_len;
@ -262,7 +262,7 @@ void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
vm->hfront_porch = ovt->hfront_porch;
vm->hsync_len = ovt->hsync_len;
vm->vactive = ovt->vactive;
vm->vback_porch = ovt->vbp;
vm->vback_porch = ovt->vback_porch;
vm->vfront_porch = ovt->vfront_porch;
vm->vsync_len = ovt->vsync_len;

4
drivers/gpu/drm/omapdrm/dss/dsi.c
View File

@ -4424,7 +4424,7 @@ static bool dsi_cm_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
t->hactive = ctx->config->timings->hactive;
t->vactive = ctx->config->timings->vactive;
t->hsync_len = t->hfront_porch = t->hback_porch = t->vsync_len = 1;
t->vfront_porch = t->vbp = 0;
t->vfront_porch = t->vback_porch = 0;
return true;
}
@ -4635,7 +4635,7 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx)
dsi_vm->hfp = hfp;
dsi_vm->vsa = req_vm->vsync_len;
dsi_vm->vbp = req_vm->vbp;
dsi_vm->vbp = req_vm->vback_porch;
dsi_vm->vact = req_vm->vactive;
dsi_vm->vfp = req_vm->vfront_porch;

6
drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
View File

@ -299,8 +299,8 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg,
video_cfg->hblank = cfg->timings.hfront_porch +
cfg->timings.hback_porch + cfg->timings.hsync_len;
video_cfg->vblank_osc = 0;
video_cfg->vblank = cfg->timings.vsync_len +
cfg->timings.vfront_porch + cfg->timings.vbp;
video_cfg->vblank = cfg->timings.vsync_len + cfg->timings.vfront_porch +
cfg->timings.vback_porch;
video_cfg->v_fc_config.hdmi_dvi_mode = cfg->hdmi_dvi_mode;
if (cfg->timings.interlace) {
@ -312,7 +312,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg,
video_cfg->vblank /= 2;
video_cfg->v_fc_config.timings.vfront_porch /= 2;
video_cfg->v_fc_config.timings.vsync_len /= 2;
video_cfg->v_fc_config.timings.vbp /= 2;
video_cfg->v_fc_config.timings.vback_porch /= 2;
}
if (cfg->timings.double_pixel) {

6
drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
View File

@ -186,7 +186,7 @@ void hdmi_wp_video_config_timing(struct hdmi_wp_data *wp,
timing_h |= FLD_VAL(timings->hsync_len - hsync_len_offset, 7, 0);
hdmi_write_reg(wp->base, HDMI_WP_VIDEO_TIMING_H, timing_h);
timing_v |= FLD_VAL(timings->vbp, 31, 20);
timing_v |= FLD_VAL(timings->vback_porch, 31, 20);
timing_v |= FLD_VAL(timings->vfront_porch, 19, 8);
timing_v |= FLD_VAL(timings->vsync_len, 7, 0);
hdmi_write_reg(wp->base, HDMI_WP_VIDEO_TIMING_V, timing_v);
@ -204,7 +204,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
timings->hback_porch = param->timings.hback_porch;
timings->hfront_porch = param->timings.hfront_porch;
timings->hsync_len = param->timings.hsync_len;
timings->vbp = param->timings.vbp;
timings->vback_porch = param->timings.vback_porch;
timings->vfront_porch = param->timings.vfront_porch;
timings->vsync_len = param->timings.vsync_len;
@ -215,7 +215,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
if (param->timings.interlace) {
video_fmt->y_res /= 2;
timings->vbp /= 2;
timings->vback_porch /= 2;
timings->vfront_porch /= 2;
timings->vsync_len /= 2;
}

2
drivers/gpu/drm/omapdrm/dss/omapdss.h
View File

@ -317,7 +317,7 @@ struct omap_video_timings {
/* Unit: line clocks */
u16 vfront_porch; /* Vertical front porch */
/* Unit: line clocks */
u16 vbp; /* Vertical back porch */
u16 vback_porch; /* Vertical back porch */
/* Vsync logic level */
enum omap_dss_signal_level vsync_level;

2
drivers/gpu/drm/omapdrm/dss/rfbi.c
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@ -863,7 +863,7 @@ static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev)
rfbi.timings.hback_porch = 1;
rfbi.timings.vsync_len = 1;
rfbi.timings.vfront_porch = 0;
rfbi.timings.vbp = 0;
rfbi.timings.vback_porch = 0;
rfbi.timings.interlace = false;
rfbi.timings.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH;

4
drivers/gpu/drm/omapdrm/dss/venc.c
View File

@ -271,7 +271,7 @@ const struct omap_video_timings omap_dss_pal_timings = {
.hback_porch = 68,
.vsync_len = 5,
.vfront_porch = 5,
.vbp = 41,
.vback_porch = 41,
.interlace = true,
@ -292,7 +292,7 @@ const struct omap_video_timings omap_dss_ntsc_timings = {
.hback_porch = 58,
.vsync_len = 6,
.vfront_porch = 6,
.vbp = 31,
.vback_porch = 31,
.interlace = true,

4
drivers/gpu/drm/omapdrm/omap_connector.c
View File

@ -55,7 +55,7 @@ void copy_timings_omap_to_drm(struct drm_display_mode *mode,
mode->vdisplay = timings->vactive;
mode->vsync_start = mode->vdisplay + timings->vfront_porch;
mode->vsync_end = mode->vsync_start + timings->vsync_len;
mode->vtotal = mode->vsync_end + timings->vbp;
mode->vtotal = mode->vsync_end + timings->vback_porch;
mode->flags = 0;
@ -89,7 +89,7 @@ void copy_timings_drm_to_omap(struct omap_video_timings *timings,
timings->vactive = mode->vdisplay;
timings->vfront_porch = mode->vsync_start - mode->vdisplay;
timings->vsync_len = mode->vsync_end - mode->vsync_start;
timings->vbp = mode->vtotal - mode->vsync_end;
timings->vback_porch = mode->vtotal - mode->vsync_end;
timings->interlace = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
timings->double_pixel = !!(mode->flags & DRM_MODE_FLAG_DBLCLK);