watchdog: omap_wdt: implement get_timeleft
The omap watchdog hardware is able to read the watchdog timer counter register. This implements this functionality in the omap_wdt driver, so one is can read the time until the watchdog will trigger the reset in seconds using WDIOC_GETTIMELEFT. Signed-off-by: Lars Poeschel <poeschel@lemonage.de> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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@ -198,6 +198,16 @@ static int omap_wdt_set_timeout(struct watchdog_device *wdog,
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return 0;
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}
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static unsigned int omap_wdt_get_timeleft(struct watchdog_device *wdog)
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{
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struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
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void __iomem *base = wdev->base;
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u32 value;
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value = readl_relaxed(base + OMAP_WATCHDOG_CRR);
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return GET_WCCR_SECS(value);
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}
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static const struct watchdog_info omap_wdt_info = {
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.options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
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.identity = "OMAP Watchdog",
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@ -209,6 +219,7 @@ static const struct watchdog_ops omap_wdt_ops = {
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.stop = omap_wdt_stop,
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.ping = omap_wdt_ping,
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.set_timeout = omap_wdt_set_timeout,
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.get_timeleft = omap_wdt_get_timeleft,
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};
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static int omap_wdt_probe(struct platform_device *pdev)
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@ -50,5 +50,6 @@
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#define PTV 0 /* prescale */
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#define GET_WLDR_VAL(secs) (0xffffffff - ((secs) * (32768/(1<<PTV))) + 1)
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#define GET_WCCR_SECS(val) ((0xffffffff - (val) + 1) / (32768/(1<<PTV)))
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#endif /* _OMAP_WATCHDOG_H */
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