drm/i915/pvc: add initial Ponte Vecchio definitions
Additional blitter and media engines will be enabled later. Bspec: 44481, 44482 Signed-off-by: Stuart Summers <stuart.summers@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220502163417.2635462-2-matthew.d.roper@intel.com
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@ -1059,6 +1059,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
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#define IS_ALDERLAKE_P(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_P)
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#define IS_XEHPSDV(dev_priv) IS_PLATFORM(dev_priv, INTEL_XEHPSDV)
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#define IS_DG2(dev_priv) IS_PLATFORM(dev_priv, INTEL_DG2)
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#define IS_PONTEVECCHIO(dev_priv) IS_PLATFORM(dev_priv, INTEL_PONTEVECCHIO)
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#define IS_DG2_G10(dev_priv) \
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IS_SUBPLATFORM(dev_priv, INTEL_DG2, INTEL_SUBPLATFORM_G10)
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#define IS_DG2_G11(dev_priv) \
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@ -1076,6 +1076,27 @@ static const struct intel_device_info ats_m_info = {
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.require_force_probe = 1,
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};
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#define XE_HPC_FEATURES \
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XE_HP_FEATURES, \
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.dma_mask_size = 52
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__maybe_unused
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static const struct intel_device_info pvc_info = {
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XE_HPC_FEATURES,
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XE_HPM_FEATURES,
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DGFX_FEATURES,
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.graphics.rel = 60,
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.media.rel = 60,
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PLATFORM(INTEL_PONTEVECCHIO),
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.display = { 0 },
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.has_flat_ccs = 0,
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.platform_engine_mask =
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BIT(BCS0) |
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BIT(VCS0) |
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BIT(CCS0) | BIT(CCS1) | BIT(CCS2) | BIT(CCS3),
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.require_force_probe = 1,
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};
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#undef PLATFORM
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/*
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@ -72,6 +72,7 @@ static const char * const platform_names[] = {
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PLATFORM_NAME(ALDERLAKE_P),
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PLATFORM_NAME(XEHPSDV),
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PLATFORM_NAME(DG2),
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PLATFORM_NAME(PONTEVECCHIO),
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};
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#undef PLATFORM_NAME
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@ -88,6 +88,7 @@ enum intel_platform {
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INTEL_ALDERLAKE_P,
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INTEL_XEHPSDV,
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INTEL_DG2,
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INTEL_PONTEVECCHIO,
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INTEL_MAX_PLATFORMS
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};
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