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firmware/dmc/icl: load v1.07 on icelake. 

Add Support to load DMC on Icelake.

While at it, also add support to load the firmware
during system resume.

v2: load firmware during system resume.(Imre)

v3: enable has_csr for icelake.(Jyoti)

v4: Only load the firmware in this patch

Cc: Jyoti Yadav <jyoti.r.yadav@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180828003844.4682-2-anusha.srivatsa@intel.com
This commit is contained in:
Anusha Srivatsa 2018-08-27 17:38:44 -07:00 committed by Rodrigo Vivi
parent 4e05047d3e
commit 4445930f1c
2 changed files with 10 additions and 0 deletions
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7
drivers/gpu/drm/i915/intel_csr.c
View File

@ -34,6 +34,9 @@
* low-power state and comes back to normal. * low-power state and comes back to normal.
*/ */
#define I915_CSR_ICL "i915/icl_dmc_ver1_07.bin"
#define ICL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
#define I915_CSR_GLK "i915/glk_dmc_ver1_04.bin" #define I915_CSR_GLK "i915/glk_dmc_ver1_04.bin"
MODULE_FIRMWARE(I915_CSR_GLK); MODULE_FIRMWARE(I915_CSR_GLK);
#define GLK_CSR_VERSION_REQUIRED CSR_VERSION(1, 4) #define GLK_CSR_VERSION_REQUIRED CSR_VERSION(1, 4)
@ -304,6 +307,8 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
if (csr->fw_path == i915_modparams.dmc_firmware_path) { if (csr->fw_path == i915_modparams.dmc_firmware_path) {
/* Bypass version check for firmware override. */ /* Bypass version check for firmware override. */
required_version = csr->version; required_version = csr->version;
} else if (IS_ICELAKE(dev_priv)) {
required_version = ICL_CSR_VERSION_REQUIRED;
} else if (IS_CANNONLAKE(dev_priv)) { } else if (IS_CANNONLAKE(dev_priv)) {
required_version = CNL_CSR_VERSION_REQUIRED; required_version = CNL_CSR_VERSION_REQUIRED;
} else if (IS_GEMINILAKE(dev_priv)) { } else if (IS_GEMINILAKE(dev_priv)) {
@ -471,6 +476,8 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
if (i915_modparams.dmc_firmware_path) if (i915_modparams.dmc_firmware_path)
csr->fw_path = i915_modparams.dmc_firmware_path; csr->fw_path = i915_modparams.dmc_firmware_path;
else if (IS_ICELAKE(dev_priv))
csr->fw_path = I915_CSR_ICL;
else if (IS_CANNONLAKE(dev_priv)) else if (IS_CANNONLAKE(dev_priv))
csr->fw_path = I915_CSR_CNL; csr->fw_path = I915_CSR_CNL;
else if (IS_GEMINILAKE(dev_priv)) else if (IS_GEMINILAKE(dev_priv))

3
drivers/gpu/drm/i915/intel_runtime_pm.c
View File

@ -3563,6 +3563,9 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
/* 7. Setup MBUS. */ /* 7. Setup MBUS. */
icl_mbus_init(dev_priv); icl_mbus_init(dev_priv);
if (resume && dev_priv->csr.dmc_payload)
intel_csr_load_program(dev_priv);
} }
static void icl_display_core_uninit(struct drm_i915_private *dev_priv) static void icl_display_core_uninit(struct drm_i915_private *dev_priv)