Merge branch 'clock' into HEAD
This is a major overhaul of the clk-qoriq driver, which I'm merging via PPC with Stephen Boyd's ack in order to apply subsequent PPC patches that depend on it.
This commit is contained in:
commit
43f2cfcce2
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@ -1,6 +1,6 @@
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* Clock Block on Freescale QorIQ Platforms
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Freescale qoriq chips take primary clocking input from the external
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Freescale QorIQ chips take primary clocking input from the external
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SYSCLK signal. The SYSCLK input (frequency) is multiplied using
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multiple phase locked loops (PLL) to create a variety of frequencies
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which can then be passed to a variety of internal logic, including
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@ -13,14 +13,16 @@ which the chip complies.
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Chassis Version Example Chips
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--------------- -------------
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1.0 p4080, p5020, p5040
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2.0 t4240, b4860, t1040
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2.0 t4240, b4860
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1. Clock Block Binding
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Required properties:
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- compatible: Should contain a specific clock block compatible string
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and a single chassis clock compatible string.
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Clock block strings include, but not limited to, one of the:
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- compatible: Should contain a chip-specific clock block compatible
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string and (if applicable) may contain a chassis-version clock
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compatible string.
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Chip-specific strings are of the form "fsl,<chip>-clockgen", such as:
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* "fsl,p2041-clockgen"
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* "fsl,p3041-clockgen"
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* "fsl,p4080-clockgen"
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@ -30,15 +32,14 @@ Required properties:
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* "fsl,b4420-clockgen"
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* "fsl,b4860-clockgen"
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* "fsl,ls1021a-clockgen"
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Chassis clock strings include:
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Chassis-version clock strings include:
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* "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks
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* "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks
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- reg: Describes the address of the device's resources within the
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address space defined by its parent bus, and resource zero
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represents the clock register set
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- clock-frequency: Input system clock frequency
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Recommended properties:
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Optional properties:
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- ranges: Allows valid translation between child's address space and
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parent's. Must be present if the device has sub-nodes.
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- #address-cells: Specifies the number of cells used to represent
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@ -47,8 +48,46 @@ Recommended properties:
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- #size-cells: Specifies the number of cells used to represent
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the size of an address. Must be present if the device has
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sub-nodes and set to 1 if present
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- clock-frequency: Input system clock frequency (SYSCLK)
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- clocks: If clock-frequency is not specified, sysclk may be provided
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as an input clock. Either clock-frequency or clocks must be
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provided.
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2. Clock Provider/Consumer Binding
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2. Clock Provider
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The clockgen node should act as a clock provider, though in older device
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trees the children of the clockgen node are the clock providers.
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When the clockgen node is a clock provider, #clock-cells = <2>.
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The first cell of the clock specifier is the clock type, and the
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second cell is the clock index for the specified type.
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Type# Name Index Cell
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0 sysclk must be 0
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1 cmux index (n in CLKCnCSR)
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2 hwaccel index (n in CLKCGnHWACSR)
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3 fman 0 for fm1, 1 for fm2
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4 platform pll 0=pll, 1=pll/2, 2=pll/3, 3=pll/4
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3. Example
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clockgen: global-utilities@e1000 {
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compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
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clock-frequency = <133333333>;
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reg = <0xe1000 0x1000>;
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#clock-cells = <2>;
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};
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fman@400000 {
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...
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clocks = <&clockgen 3 0>;
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...
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};
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}
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4. Legacy Child Nodes
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NOTE: These nodes are deprecated. Kernels should continue to support
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device trees with these nodes, but new device trees should not use them.
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Most of the bindings are from the common clock binding[1].
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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@ -82,7 +121,7 @@ Recommended properties:
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- reg: Should be the offset and length of clock block base address.
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The length should be 4.
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Example for clock block and clock provider:
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Legacy Example:
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/ {
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clockgen: global-utilities@e1000 {
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compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
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@ -142,7 +181,7 @@ Example for clock block and clock provider:
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};
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};
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Example for clock consumer:
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Example for legacy clock consumer:
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/ {
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cpu0: PowerPC,e5500@0 {
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@ -34,6 +34,7 @@
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#include <linux/of_device.h>
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#include <linux/phy.h>
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#include <linux/memblock.h>
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#include <linux/fsl/guts.h>
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#include <linux/atomic.h>
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#include <asm/time.h>
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#include <asm/qe_ic.h>
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#include <asm/mpic.h>
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#include <asm/swiotlb.h>
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#include <asm/fsl_guts.h>
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#include "smp.h"
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#include "mpc85xx.h"
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#include <linux/seq_file.h>
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#include <linux/interrupt.h>
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#include <linux/of_platform.h>
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#include <linux/fsl/guts.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/mpic.h>
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#include <asm/qe.h>
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#include <asm/qe_ic.h>
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#include <asm/fsl_guts.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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* kind, whether express or implied.
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*/
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#include <linux/fsl/guts.h>
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#include <linux/pci.h>
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#include <linux/of_platform.h>
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#include <asm/div64.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include <asm/udbg.h>
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#include <asm/fsl_guts.h>
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#include <asm/fsl_lbc.h>
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#include "smp.h"
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* kind, whether express or implied.
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*/
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#include <linux/fsl/guts.h>
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#include <linux/pci.h>
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#include <linux/of_platform.h>
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#include <asm/div64.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include <asm/udbg.h>
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#include <asm/fsl_guts.h>
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#include "smp.h"
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#include "mpc85xx.h"
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#include <linux/kexec.h>
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#include <linux/highmem.h>
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#include <linux/cpu.h>
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#include <linux/fsl/guts.h>
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#include <asm/machdep.h>
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#include <asm/pgtable.h>
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#include <asm/mpic.h>
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#include <asm/cacheflush.h>
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#include <asm/dbell.h>
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#include <asm/fsl_guts.h>
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#include <asm/code-patching.h>
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#include <asm/cputhreads.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/fsl/guts.h>
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#include <linux/pci.h>
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#include <linux/of_platform.h>
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#include <asm/mpic.h>
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#include <asm/qe.h>
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#include <asm/qe_ic.h>
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#include <asm/fsl_guts.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/of.h>
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#include <linux/fsl/guts.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <sysdev/fsl_pci.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/simple_gpio.h>
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#include <asm/fsl_guts.h>
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#include "mpc86xx.h"
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config CLK_QORIQ
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bool "Clock driver for Freescale QorIQ platforms"
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depends on (PPC_E500MC || ARM) && OF
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depends on (PPC_E500MC || ARM || ARM64) && OF
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---help---
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This adds the clock driver support for Freescale QorIQ platforms
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using common clock framework.
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File diff suppressed because it is too large
Load Diff
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#include "fsl_pamu.h"
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#include <linux/fsl/guts.h>
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#include <linux/interrupt.h>
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#include <linux/genalloc.h>
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#include <asm/mpc85xx.h>
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#include <asm/fsl_guts.h>
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/* define indexes for each operation mapping scenario */
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#define OMI_QMAN 0x00
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* option) any later version.
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*/
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#ifndef __ASM_POWERPC_FSL_GUTS_H__
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#define __ASM_POWERPC_FSL_GUTS_H__
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#ifdef __KERNEL__
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#ifndef __FSL_GUTS_H__
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#define __FSL_GUTS_H__
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#include <linux/types.h>
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/**
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* Global Utility Registers.
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#endif
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#endif
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#endif
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/fsl/guts.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/slab.h>
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#include <sound/soc.h>
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#include <asm/fsl_guts.h>
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#include "fsl_dma.h"
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#include "fsl_ssi.h"
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*/
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#include <linux/module.h>
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#include <linux/fsl/guts.h>
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#include <linux/interrupt.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/slab.h>
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#include <sound/soc.h>
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#include <asm/fsl_guts.h>
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#include "fsl_dma.h"
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#include "fsl_ssi.h"
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*/
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#include <linux/module.h>
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#include <linux/fsl/guts.h>
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#include <linux/interrupt.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/slab.h>
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#include <sound/soc.h>
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#include <asm/fsl_guts.h>
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#include "fsl_dma.h"
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#include "fsl_ssi.h"
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