mmc: sdhci-pci: SDIO host controller support for Intel Quark X1000
This patch is to enable SDIO host controller for Intel Quark X1000. Signed-off-by: Derek Browne <Derek.Browne@intel.com> Signed-off-by: Alvin (Weike) Chen <alvin.chen@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -103,6 +103,10 @@ static const struct sdhci_pci_fixes sdhci_cafe = {
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SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
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};
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static const struct sdhci_pci_fixes sdhci_intel_qrk = {
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.quirks = SDHCI_QUIRK_NO_HISPD_BIT,
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};
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static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
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{
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slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
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@ -751,6 +755,14 @@ static const struct pci_device_id pci_ids[] = {
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.driver_data = (kernel_ulong_t)&sdhci_rtsx,
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},
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{
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = PCI_DEVICE_ID_INTEL_QRK_SD,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_intel_qrk,
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},
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{
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = PCI_DEVICE_ID_INTEL_MRST_SD0,
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@ -17,6 +17,7 @@
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#define PCI_DEVICE_ID_INTEL_CLV_SDIO2 0x08fb
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#define PCI_DEVICE_ID_INTEL_CLV_EMMC0 0x08e5
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#define PCI_DEVICE_ID_INTEL_CLV_EMMC1 0x08e6
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#define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7
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/*
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* PCI registers
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