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MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDS 

SB1250 uart bug is related to PASS 2 workarounds. Use config
CONFIG_SB1_PASS_2_WORKAROUNDS directly and get rid of SIBYTE_1956_WAR.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Thomas Bogendoerfer 2020-08-24 18:32:51 +02:00
parent a7fbed988f
commit 43df4eb2fc
14 changed files with 4 additions and 25 deletions
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1
arch/mips/include/asm/mach-cavium-octeon/war.h
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@ -10,7 +10,6 @@
#define __ASM_MIPS_MACH_CAVIUM_OCTEON_WAR_H
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#define CAVIUM_OCTEON_DCACHE_PREFETCH_WAR \
OCTEON_IS_MODEL(OCTEON_CN6XXX)

1
arch/mips/include/asm/mach-generic/war.h
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@ -9,6 +9,5 @@
#define __ASM_MACH_GENERIC_WAR_H
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#endif /* __ASM_MACH_GENERIC_WAR_H */

1
arch/mips/include/asm/mach-ip22/war.h
View File

@ -9,6 +9,5 @@
#define __ASM_MIPS_MACH_IP22_WAR_H
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#endif /* __ASM_MIPS_MACH_IP22_WAR_H */

1
arch/mips/include/asm/mach-ip27/war.h
View File

@ -9,6 +9,5 @@
#define __ASM_MIPS_MACH_IP27_WAR_H
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#endif /* __ASM_MIPS_MACH_IP27_WAR_H */

1
arch/mips/include/asm/mach-ip28/war.h
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@ -9,6 +9,5 @@
#define __ASM_MIPS_MACH_IP28_WAR_H
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#endif /* __ASM_MIPS_MACH_IP28_WAR_H */

1
arch/mips/include/asm/mach-ip30/war.h
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@ -6,6 +6,5 @@
#define __ASM_MIPS_MACH_IP30_WAR_H
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#endif /* __ASM_MIPS_MACH_IP30_WAR_H */

1
arch/mips/include/asm/mach-ip32/war.h
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@ -9,6 +9,5 @@
#define __ASM_MIPS_MACH_IP32_WAR_H
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#endif /* __ASM_MIPS_MACH_IP32_WAR_H */

1
arch/mips/include/asm/mach-malta/war.h
View File

@ -9,6 +9,5 @@
#define __ASM_MIPS_MACH_MIPS_WAR_H
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#endif /* __ASM_MIPS_MACH_MIPS_WAR_H */

1
arch/mips/include/asm/mach-rc32434/war.h
View File

@ -9,6 +9,5 @@
#define __ASM_MIPS_MACH_MIPS_WAR_H
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#endif /* __ASM_MIPS_MACH_MIPS_WAR_H */

1
arch/mips/include/asm/mach-rm/war.h
View File

@ -9,6 +9,5 @@
#define __ASM_MIPS_MACH_RM_WAR_H
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#endif /* __ASM_MIPS_MACH_RM_WAR_H */

2
arch/mips/include/asm/mach-sibyte/war.h
View File

@ -15,12 +15,10 @@ extern int sb1250_m3_workaround_needed(void);
#endif
#define BCM1250_M3_WAR sb1250_m3_workaround_needed()
#define SIBYTE_1956_WAR 1
#else
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#endif

1
arch/mips/include/asm/mach-tx49xx/war.h
View File

@ -9,6 +9,5 @@
#define __ASM_MIPS_MACH_TX49XX_WAR_H
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#endif /* __ASM_MIPS_MACH_TX49XX_WAR_H */

7
arch/mips/include/asm/war.h
View File

@ -86,11 +86,4 @@
#error Check setting of BCM1250_M3_WAR for your platform
#endif
/*
* This is a DUART workaround related to glitches around register accesses
*/
#ifndef SIBYTE_1956_WAR
#error Check setting of SIBYTE_1956_WAR for your platform
#endif
#endif /* _ASM_WAR_H */

9
drivers/tty/serial/sb1250-duart.c
View File

@ -35,7 +35,6 @@
#include <linux/refcount.h>
#include <asm/io.h>
#include <asm/war.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_uart.h>
@ -157,7 +156,7 @@ static unsigned char read_sbdchn(struct sbd_port *sport, int reg)
unsigned char retval;
retval = __read_sbdchn(sport, reg);
if (SIBYTE_1956_WAR)
if (IS_ENABLED(CONFIG_SB1_PASS_2_WORKAROUNDS))
__war_sbd1956(sport);
return retval;
}
@ -167,7 +166,7 @@ static unsigned char read_sbdshr(struct sbd_port *sport, int reg)
unsigned char retval;
retval = __read_sbdshr(sport, reg);
if (SIBYTE_1956_WAR)
if (IS_ENABLED(CONFIG_SB1_PASS_2_WORKAROUNDS))
__war_sbd1956(sport);
return retval;
}
@ -175,14 +174,14 @@ static unsigned char read_sbdshr(struct sbd_port *sport, int reg)
static void write_sbdchn(struct sbd_port *sport, int reg, unsigned int value)
{
__write_sbdchn(sport, reg, value);
if (SIBYTE_1956_WAR)
if (IS_ENABLED(CONFIG_SB1_PASS_2_WORKAROUNDS))
__war_sbd1956(sport);
}
static void write_sbdshr(struct sbd_port *sport, int reg, unsigned int value)
{
__write_sbdshr(sport, reg, value);
if (SIBYTE_1956_WAR)
if (IS_ENABLED(CONFIG_SB1_PASS_2_WORKAROUNDS))
__war_sbd1956(sport);
}