Lower sd card speeds for two boards to make them run more reliable,

missing 32k clock definition for Anbric xx3 devices, missing cache-levels
 for rk3588, fixed rk3326-board display supplies and more dt-schema fixes.
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Merge tag 'v6.3-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes

Lower sd card speeds for two boards to make them run more reliable,
missing 32k clock definition for Anbric xx3 devices, missing cache-levels
for rk3588, fixed rk3326-board display supplies and more dt-schema fixes.

* tag 'v6.3-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: correct panel supplies on some rk3326 boards
  arm64: dts: rockchip: use just "port" in panel on RockPro64
  arm64: dts: rockchip: use just "port" in panel on Pinebook Pro
  arm64: dts: rockchip: Remove non-existing pwm-delay-us property
  arm64: dts: rockchip: Add clk_rtc_32k to Anbernic xx3 Devices
  arm64: dts: rockchip: add rk3588 cache level information
  arm64: dts: rockchip: Lower SD card speed on rk3399 Pinebook Pro
  arm64: dts: rockchip: Lower sd speed on rk3566-soquartz
  ARM: dts: rockchip: fix a typo error for rk3288 spdif node
  arm64: dts: rockchip: Fix rk3399 GICv3 ITS node name

Link: https://lore.kernel.org/r/10559306.CDJkKcVGEf@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-04-14 13:51:22 +02:00
commit 43950556b7
15 changed files with 33 additions and 35 deletions

View File

@ -942,7 +942,7 @@
status = "disabled";
};
spdif: sound@ff88b0000 {
spdif: sound@ff8b0000 {
compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
reg = <0x0 0xff8b0000 0x0 0x10000>;
#sound-dai-cells = <0>;

View File

@ -24,6 +24,8 @@
&internal_display {
compatible = "elida,kd35t133";
iovcc-supply = <&vcc_lcd>;
vdd-supply = <&vcc_lcd>;
};
&pwm0 {

View File

@ -235,10 +235,8 @@
internal_display: panel@0 {
reg = <0>;
backlight = <&backlight>;
iovcc-supply = <&vcc_lcd>;
reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
rotation = <270>;
vdd-supply = <&vcc_lcd>;
port {
mipi_in_panel: endpoint {

View File

@ -83,6 +83,8 @@
&internal_display {
compatible = "elida,kd35t133";
iovcc-supply = <&vcc_lcd>;
vdd-supply = <&vcc_lcd>;
};
&rk817 {

View File

@ -59,6 +59,8 @@
&internal_display {
compatible = "elida,kd35t133";
iovcc-supply = <&vcc_lcd>;
vdd-supply = <&vcc_lcd>;
};
&rk817_charger {

View File

@ -61,7 +61,6 @@
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
pwm-delay-us = <10000>;
};
emmc_pwrseq: emmc-pwrseq {

View File

@ -198,7 +198,6 @@
power-supply = <&pp3300_disp>;
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
pwm-delay-us = <10000>;
};
gpio_keys: gpio-keys {

View File

@ -167,7 +167,6 @@
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
pwms = <&pwm1 0 1000000 0>;
pwm-delay-us = <10000>;
};
dmic: dmic {

View File

@ -50,19 +50,9 @@
pinctrl-0 = <&panel_en_pin>;
power-supply = <&vcc3v3_panel>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
panel_in_edp: endpoint@0 {
reg = <0>;
remote-endpoint = <&edp_out_panel>;
};
port {
panel_in_edp: endpoint {
remote-endpoint = <&edp_out_panel>;
};
};
};
@ -943,7 +933,7 @@
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
sd-uhs-sdr104;
sd-uhs-sdr50;
vmmc-supply = <&vcc3v0_sd>;
vqmmc-supply = <&vcc_sdio>;
status = "okay";

View File

@ -647,16 +647,10 @@
avdd-supply = <&avdd>;
backlight = <&backlight>;
dvdd-supply = <&vcc3v3_s0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mipi_in_panel: endpoint {
remote-endpoint = <&mipi_out_panel>;
};
port {
mipi_in_panel: endpoint {
remote-endpoint = <&mipi_out_panel>;
};
};
};

View File

@ -552,7 +552,7 @@
<0x0 0xfff10000 0 0x10000>, /* GICH */
<0x0 0xfff20000 0 0x10000>; /* GICV */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
its: interrupt-controller@fee20000 {
its: msi-controller@fee20000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;

View File

@ -16,8 +16,10 @@
};
&cru {
assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
assigned-clock-rates = <1200000000>, <200000000>, <241500000>;
assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
<&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
assigned-clock-rates = <32768>, <1200000000>,
<200000000>, <241500000>;
};
&gpio_keys_control {

View File

@ -105,8 +105,10 @@
};
&cru {
assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
assigned-clock-rates = <1200000000>, <200000000>, <500000000>;
assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
<&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
assigned-clock-rates = <32768>, <1200000000>,
<200000000>, <500000000>;
};
&dsi_dphy0 {

View File

@ -598,7 +598,7 @@
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
sd-uhs-sdr104;
sd-uhs-sdr50;
vmmc-supply = <&vcc3v3_sys>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";

View File

@ -222,6 +222,7 @@
cache-size = <131072>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -230,6 +231,7 @@
cache-size = <131072>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -238,6 +240,7 @@
cache-size = <131072>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -246,6 +249,7 @@
cache-size = <131072>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -254,6 +258,7 @@
cache-size = <524288>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -262,6 +267,7 @@
cache-size = <524288>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -270,6 +276,7 @@
cache-size = <524288>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -278,6 +285,7 @@
cache-size = <524288>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -286,6 +294,7 @@
cache-size = <3145728>;
cache-line-size = <64>;
cache-sets = <4096>;
cache-level = <3>;
};
};