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pinctrl: mvebu: armada-370: fix spi0 pin description 

Due to a mistake, the CS0 and CS1 SPI0 functions were incorrectly
named "spi0-1" instead of just "spi0". This commit fixes that.

This DT binding change does not affect any of the in-tree users.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.7+
Fixes: 5f597bb2be ("pinctrl: mvebu: add pinctrl driver for Armada 370")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Thomas Petazzoni 2015-06-09 18:46:54 +02:00 committed by Linus Walleij
parent 331642fbf2
commit 438881dfdd
2 changed files with 4 additions and 4 deletions
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4
Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt
View File

@ -92,5 +92,5 @@ mpp61 61 gpo, dev(wen1), uart1(txd), audio(rclk)
mpp62 62 gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0), mpp62 62 gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0),
audio(mclk), uart0(cts) audio(mclk), uart0(cts)
mpp63 63 gpo, spi0(sck), tclk mpp63 63 gpo, spi0(sck), tclk
mpp64 64 gpio, spi0(miso), spi0-1(cs1) mpp64 64 gpio, spi0(miso), spi0(cs1)
mpp65 65 gpio, spi0(mosi), spi0-1(cs2) mpp65 65 gpio, spi0(mosi), spi0(cs2)

4
drivers/pinctrl/mvebu/pinctrl-armada-370.c
View File

@ -370,11 +370,11 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
MPP_MODE(64, MPP_MODE(64,
MPP_FUNCTION(0x0, "gpio", NULL), MPP_FUNCTION(0x0, "gpio", NULL),
MPP_FUNCTION(0x1, "spi0", "miso"), MPP_FUNCTION(0x1, "spi0", "miso"),
MPP_FUNCTION(0x2, "spi0-1", "cs1")), MPP_FUNCTION(0x2, "spi0", "cs1")),
MPP_MODE(65, MPP_MODE(65,
MPP_FUNCTION(0x0, "gpio", NULL), MPP_FUNCTION(0x0, "gpio", NULL),
MPP_FUNCTION(0x1, "spi0", "mosi"), MPP_FUNCTION(0x1, "spi0", "mosi"),
MPP_FUNCTION(0x2, "spi0-1", "cs2")), MPP_FUNCTION(0x2, "spi0", "cs2")),
}; };
static struct mvebu_pinctrl_soc_info armada_370_pinctrl_info; static struct mvebu_pinctrl_soc_info armada_370_pinctrl_info;