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ASoC: SOF: mediatek: Add mt8195 dsp clock support 

Add adsp clock on/off support on mt8195 platform.

Signed-off-by: YC Hung <yc.hung@mediatek.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Link: https://lore.kernel.org/r/20211118100749.54628-8-daniel.baluta@oss.nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
YC Hung 2021-11-18 12:07:48 +02:00 committed by Mark Brown
parent 24d75049c5
commit 424d6d1a9a
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
5 changed files with 208 additions and 4 deletions
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2
sound/soc/sof/mediatek/adsp_helper.h
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@ -39,7 +39,7 @@ struct adsp_priv {
struct mbox_controller *adsp_mbox;
struct mtk_adsp_chip_info *adsp;
struct clk **clk;
u32 (*ap2adsp_addr)(u32 addr, void *data);
u32 (*adsp2ap_addr)(u32 addr, void *data);

2
sound/soc/sof/mediatek/mt8195/Makefile
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@ -1,3 +1,3 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
snd-sof-mt8195-objs := mt8195.o mt8195-loader.o
snd-sof-mt8195-objs := mt8195.o mt8195-clk.o mt8195-loader.o
obj-$(CONFIG_SND_SOC_SOF_MT8195) += snd-sof-mt8195.o

158
sound/soc/sof/mediatek/mt8195/mt8195-clk.c Normal file
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@ -0,0 +1,158 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
//
// Copyright(c) 2021 Mediatek Corporation. All rights reserved.
//
// Author: YC Hung <yc.hung@mediatek.com>
//
// Hardware interface for mt8195 DSP clock
#include <linux/clk.h>
#include <linux/pm_runtime.h>
#include <linux/io.h>
#include "mt8195.h"
#include "mt8195-clk.h"
#include "../adsp_helper.h"
#include "../../sof-audio.h"
static const char *adsp_clks[ADSP_CLK_MAX] = {
[CLK_TOP_ADSP] = "adsp_sel",
[CLK_TOP_CLK26M] = "clk26m_ck",
[CLK_TOP_AUDIO_LOCAL_BUS] = "audio_local_bus",
[CLK_TOP_MAINPLL_D7_D2] = "mainpll_d7_d2",
[CLK_SCP_ADSP_AUDIODSP] = "scp_adsp_audiodsp",
[CLK_TOP_AUDIO_H] = "audio_h",
};
int mt8195_adsp_init_clock(struct snd_sof_dev *sdev)
{
struct device *dev = sdev->dev;
struct adsp_priv *priv = sdev->pdata->hw_pdata;
int i;
priv->clk = devm_kcalloc(dev, ADSP_CLK_MAX, sizeof(*priv->clk), GFP_KERNEL);
if (!priv->clk)
return -ENOMEM;
for (i = 0; i < ADSP_CLK_MAX; i++) {
priv->clk[i] = devm_clk_get(dev, adsp_clks[i]);
if (IS_ERR(priv->clk[i]))
return PTR_ERR(priv->clk[i]);
}
return 0;
}
static int adsp_enable_all_clock(struct snd_sof_dev *sdev)
{
struct device *dev = sdev->dev;
struct adsp_priv *priv = sdev->pdata->hw_pdata;
int ret;
ret = clk_prepare_enable(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
if (ret) {
dev_err(dev, "%s clk_prepare_enable(mainpll_d7_d2) fail %d\n",
__func__, ret);
return ret;
}
ret = clk_prepare_enable(priv->clk[CLK_TOP_ADSP]);
if (ret) {
dev_err(dev, "%s clk_prepare_enable(adsp_sel) fail %d\n",
__func__, ret);
goto disable_mainpll_d7_d2_clk;
}
ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
if (ret) {
dev_err(dev, "%s clk_prepare_enable(audio_local_bus) fail %d\n",
__func__, ret);
goto disable_dsp_sel_clk;
}
ret = clk_prepare_enable(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
if (ret) {
dev_err(dev, "%s clk_prepare_enable(scp_adsp_audiodsp) fail %d\n",
__func__, ret);
goto disable_audio_local_bus_clk;
}
ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIO_H]);
if (ret) {
dev_err(dev, "%s clk_prepare_enable(audio_h) fail %d\n",
__func__, ret);
goto disable_scp_adsp_audiodsp_clk;
}
return 0;
disable_scp_adsp_audiodsp_clk:
clk_disable_unprepare(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
disable_audio_local_bus_clk:
clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
disable_dsp_sel_clk:
clk_disable_unprepare(priv->clk[CLK_TOP_ADSP]);
disable_mainpll_d7_d2_clk:
clk_disable_unprepare(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
return ret;
}
static void adsp_disable_all_clock(struct snd_sof_dev *sdev)
{
struct adsp_priv *priv = sdev->pdata->hw_pdata;
clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_H]);
clk_disable_unprepare(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
clk_disable_unprepare(priv->clk[CLK_TOP_ADSP]);
clk_disable_unprepare(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
}
static int adsp_default_clk_init(struct snd_sof_dev *sdev, bool enable)
{
struct device *dev = sdev->dev;
struct adsp_priv *priv = sdev->pdata->hw_pdata;
int ret;
dev_dbg(dev, "%s: %s\n", __func__, enable ? "on" : "off");
if (enable) {
ret = clk_set_parent(priv->clk[CLK_TOP_ADSP],
priv->clk[CLK_TOP_CLK26M]);
if (ret) {
dev_err(dev, "failed to set dsp_sel to clk26m: %d\n", ret);
return ret;
}
ret = clk_set_parent(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS],
priv->clk[CLK_TOP_MAINPLL_D7_D2]);
if (ret) {
dev_err(dev, "set audio_local_bus failed %d\n", ret);
return ret;
}
ret = adsp_enable_all_clock(sdev);
if (ret) {
dev_err(dev, "failed to adsp_enable_clock: %d\n", ret);
return ret;
}
} else {
adsp_disable_all_clock(sdev);
}
return 0;
}
int adsp_clock_on(struct snd_sof_dev *sdev)
{
/* Open ADSP clock */
return adsp_default_clk_init(sdev, 1);
}
int adsp_clock_off(struct snd_sof_dev *sdev)
{
/* Close ADSP clock */
return adsp_default_clk_init(sdev, 0);
}

28
sound/soc/sof/mediatek/mt8195/mt8195-clk.h Normal file
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@ -0,0 +1,28 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2021 MediaTek Corporation. All rights reserved.
*
* Header file for the mt8195 DSP clock definition
*/
#ifndef __MT8195_CLK_H
#define __MT8195_CLK_H
struct snd_sof_dev;
/*DSP clock*/
enum adsp_clk_id {
CLK_TOP_ADSP,
CLK_TOP_CLK26M,
CLK_TOP_AUDIO_LOCAL_BUS,
CLK_TOP_MAINPLL_D7_D2,
CLK_SCP_ADSP_AUDIODSP,
CLK_TOP_AUDIO_H,
ADSP_CLK_MAX
};
int mt8195_adsp_init_clock(struct snd_sof_dev *sdev);
int adsp_clock_on(struct snd_sof_dev *sdev);
int adsp_clock_off(struct snd_sof_dev *sdev);
#endif

22
sound/soc/sof/mediatek/mt8195/mt8195.c
View File

@ -25,6 +25,7 @@
#include "../adsp_helper.h"
#include "../mediatek-ops.h"
#include "mt8195.h"
#include "mt8195-clk.h"
static int platform_parse_resource(struct platform_device *pdev, void *data)
{
@ -231,10 +232,22 @@ static int mt8195_dsp_probe(struct snd_sof_dev *sdev)
if (ret)
return ret;
ret = mt8195_adsp_init_clock(sdev);
if (ret) {
dev_err(sdev->dev, "mt8195_adsp_init_clock failed\n");
return -EINVAL;
}
ret = adsp_clock_on(sdev);
if (ret) {
dev_err(sdev->dev, "adsp_clock_on fail!\n");
return -EINVAL;
}
ret = adsp_sram_power_on(sdev->dev, true);
if (ret) {
dev_err(sdev->dev, "adsp_sram_power_on fail!\n");
return ret;
goto exit_clk_disable;
}
ret = adsp_memory_remap_init(&pdev->dev, priv->adsp);
@ -282,6 +295,8 @@ static int mt8195_dsp_probe(struct snd_sof_dev *sdev)
err_adsp_sram_power_off:
adsp_sram_power_on(&pdev->dev, false);
exit_clk_disable:
adsp_clock_off(sdev);
return ret;
}
@ -290,7 +305,10 @@ static int mt8195_dsp_remove(struct snd_sof_dev *sdev)
{
struct platform_device *pdev = container_of(sdev->dev, struct platform_device, dev);
return adsp_sram_power_on(&pdev->dev, false);
adsp_sram_power_on(&pdev->dev, false);
adsp_clock_off(sdev);
return 0;
}
/* on mt8195 there is 1 to 1 match between type and BAR idx */