ARM: dts: am335x-myirtech-*: Add DT for AM335X MYIR Tech Limited board
This patch adds basic support for MYIR Tech MYC-AM335X CPU Module: - Up to 1GHz TI AM335X Series ARM Cortex-A8 Processors - Up to 512MB DDR3 SDRAM - Up to 512MB Nand Flash and MYD-AM335X Development Board: - MYC-AM335X CPU Module as Controller Board - Serial ports, 4 x USB Host, OTG, 2 x Gigabit Ethernet, CAN, RS485, TF, Audio - Supports HDMI and LCD Display Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Alexander Shiyan
Tony Lindgren
parent
00dba495f1
commit
4231f3a72f
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@ -817,6 +817,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
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am335x-lxm.dtb \
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am335x-moxa-uc-2101.dtb \
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am335x-moxa-uc-8100-me-t.dtb \
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am335x-myirtech-myd.dtb \
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am335x-nano.dtb \
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am335x-netcan-plus-1xx.dtb \
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am335x-netcom-plus-2xx.dtb \
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@ -0,0 +1,267 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/* SPDX-FileCopyrightText: Alexander Shiyan, <shc_work@mail.ru> */
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/* Based on code by myc_c335x.dts, MYiRtech.com */
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/* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ */
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/dts-v1/;
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#include "am33xx.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "MYIR MYC-AM335X";
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compatible = "myir,myc-am335x", "ti,am33xx";
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cpus {
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cpu@0 {
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cpu0-supply = <&vdd_core>;
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voltage-tolerance = <2>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x10000000>;
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};
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vdd_mod: vdd_mod_reg {
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compatible = "regulator-fixed";
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regulator-name = "vdd-mod";
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_core: vdd_core_reg {
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compatible = "regulator-fixed";
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regulator-name = "vdd-core";
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vdd_mod>;
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};
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leds: leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&led_mod_pins>;
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led_mod: led_mod {
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label = "module:user";
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gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_GREEN>;
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default-state = "off";
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panic-indicator;
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};
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};
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};
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&cpsw_emac0 {
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phy-handle = <&phy0>;
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phy-mode = "rgmii-id";
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};
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&davinci_mdio {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&mdio_pins_default>;
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pinctrl-1 = <&mdio_pins_sleep>;
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status = "okay";
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phy0: ethernet-phy@4 {
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reg = <4>;
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};
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};
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&elm {
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status = "okay";
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};
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&gpmc {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&nand_pins_default>;
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pinctrl-1 = <&nand_pins_sleep>;
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ranges = <0 0 0x8000000 0x1000000>;
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status = "okay";
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nand0: nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>;
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, <1 IRQ_TYPE_NONE>;
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nand-bus-width = <8>;
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rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>;
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gpmc,device-width = <1>;
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-on-ns = <0>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-on-ns = <0>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,bus-turnaround-ns = <0>;
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gpmc,cycle2cycle-delay-ns = <0>;
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gpmc,clk-activation-ns = <0>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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ti,elm-id = <&elm>;
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ti,nand-ecc-opt = "bch8";
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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&i2c0 {
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pinctrl-names = "default", "gpio", "sleep";
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pinctrl-0 = <&i2c0_pins_default>;
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pinctrl-1 = <&i2c0_pins_gpio>;
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pinctrl-2 = <&i2c0_pins_sleep>;
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clock-frequency = <400000>;
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scl-gpios = <&gpio3 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio3 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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eeprom: eeprom@50 {
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compatible = "atmel,24c32";
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reg = <0x50>;
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pagesize = <32>;
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vcc-supply = <&vdd_mod>;
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};
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};
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&mac {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <ð_slave1_pins_default>;
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pinctrl-1 = <ð_slave1_pins_sleep>;
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slaves = <1>;
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status = "okay";
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};
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&rtc {
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system-power-controller;
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};
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&am33xx_pinmux {
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mdio_pins_default: pinmux_mdio_pins_default {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) /* mdio_data */
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) /* mdio_clk */
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>;
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};
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mdio_pins_sleep: pinmux_mdio_pins_sleep {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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eth_slave1_pins_default: pinmux_eth_slave1_pins_default {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii1_tctl */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii1_rctl */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii1_td3 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii1_td2 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii1_td1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii1_td0 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii1_tclk */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii1_rclk */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii1_rd3 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii1_rd2 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii1_rd1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii1_rd0 */
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>;
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};
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eth_slave1_pins_sleep: pinmux_eth_slave1_pins_sleep {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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i2c0_pins_default: pinmux_i2c0_pins_default {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE0) /* I2C0_SDA */
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AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE0) /* I2C0_SCL */
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>;
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};
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i2c0_pins_gpio: pinmux_i2c0_pins_gpio {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT, MUX_MODE7) /* gpio3[5] */
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AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT, MUX_MODE7) /* gpio3[6] */
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>;
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};
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i2c0_pins_sleep: pinmux_i2c0_pins_sleep {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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led_mod_pins: pinmux_led_mod_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpio3[18] */
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>;
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};
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nand_pins_default: pinmux_nand_pins_default {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad0 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad1 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad2 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad3 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad4 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad5 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad6 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad7 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_wait0 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpio0[31] */
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0) /* gpmc_csn0 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0) /* gpmc_advn_ale */
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AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0) /* gpmc_oen_ren */
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AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0) /* gpmc_wen */
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AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0) /* gpmc_be0n_cle */
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>;
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};
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nand_pins_sleep: pinmux_nand_pins_sleep {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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};
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@ -0,0 +1,536 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/* SPDX-FileCopyrightText: Alexander Shiyan, <shc_work@mail.ru> */
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/* Based on code by myd_c335x.dts, MYiRtech.com */
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/* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ */
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/dts-v1/;
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#include "am335x-myirtech-myc.dtsi"
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#include <dt-bindings/display/tda998x.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "MYIR MYD-AM335X";
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compatible = "myir,myd-am335x", "myir,myc-am335x", "ti,am33xx";
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chosen {
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stdout-path = &uart0;
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};
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clk12m: clk12m {
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compatible = "fixed-clock";
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clock-frequency = <12000000>;
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#clock-cells = <0>;
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};
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gpio_buttons: gpio_buttons {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&gpio_buttons_pins>;
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#address-cells = <1>;
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#size-cells = <0>;
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button1: button@0 {
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reg = <0>;
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label = "button1";
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linux,code = <BTN_1>;
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gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
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};
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button2: button@1 {
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reg = <1>;
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label = "button2";
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linux,code = <BTN_2>;
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gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
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};
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};
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sound: sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&master_codec>;
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simple-audio-card,frame-master = <&master_codec>;
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simple-audio-card,cpu {
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sound-dai = <&mcasp0>;
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};
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master_codec: simple-audio-card,codec@1 {
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sound-dai = <&sgtl5000>;
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};
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simple-audio-card,codec@2 {
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sound-dai = <&tda9988>;
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};
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};
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vdd_5v0: vdd_5v0_reg {
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compatible = "regulator-fixed";
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regulator-name = "vdd_5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_3v3: vdd_3v3_reg {
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compatible = "regulator-fixed";
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regulator-name = "vdd-3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&vdd_5v0>;
|
||||
};
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy-handle = <&phy1>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
phy1: ethernet-phy@6 {
|
||||
reg = <6>;
|
||||
eee-broken-1000t;
|
||||
};
|
||||
};
|
||||
|
||||
&dcan0 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&dcan0_pins_default>;
|
||||
pinctrl-1 = <&dcan0_pins_sleep>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dcan1 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&dcan1_pins_default>;
|
||||
pinctrl-1 = <&dcan1_pins_sleep>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehrpwm0 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&ehrpwm0_pins_default>;
|
||||
pinctrl-1 = <&ehrpwm0_pins_sleep>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&epwmss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default", "gpio", "sleep";
|
||||
pinctrl-0 = <&i2c1_pins_default>;
|
||||
pinctrl-1 = <&i2c1_pins_gpio>;
|
||||
pinctrl-2 = <&i2c1_pins_sleep>;
|
||||
clock-frequency = <400000>;
|
||||
scl-gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio0 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
|
||||
sgtl5000: sgtl5000@a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg =<0xa>;
|
||||
clocks = <&clk12m>;
|
||||
micbias-resistor-k-ohms = <4>;
|
||||
micbias-voltage-m-volts = <2250>;
|
||||
VDDA-supply = <&vdd_3v3>;
|
||||
VDDIO-supply = <&vdd_3v3>;
|
||||
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
tda9988: tda9988@70 {
|
||||
compatible = "nxp,tda998x";
|
||||
reg =<0x70>;
|
||||
audio-ports = <TDA998x_I2S 1>;
|
||||
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
ports {
|
||||
port@0 {
|
||||
hdmi_0: endpoint@0 {
|
||||
remote-endpoint = <&lcdc_0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&lcdc {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&lcdc_pins_default>;
|
||||
pinctrl-1 = <&lcdc_pins_sleep>;
|
||||
blue-and-red-wiring = "straight";
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
lcdc_0: endpoint@0 {
|
||||
remote-endpoint = <&hdmi_0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&leds {
|
||||
pinctrl-0 = <&led_mod_pins &leds_pins>;
|
||||
|
||||
led1: led1 {
|
||||
label = "base:user1";
|
||||
gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2: led2 {
|
||||
label = "base:user2";
|
||||
gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
&mac {
|
||||
pinctrl-0 = <ð_slave1_pins_default>, <ð_slave2_pins_default>;
|
||||
pinctrl-1 = <ð_slave1_pins_sleep>, <ð_slave2_pins_sleep>;
|
||||
slaves = <2>;
|
||||
};
|
||||
|
||||
&mcasp0 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&mcasp0_pins_default>;
|
||||
pinctrl-1 = <&mcasp0_pins_sleep>;
|
||||
op-mode = <0>;
|
||||
tdm-slots = <2>;
|
||||
serial-dir = <0 1 2 0>;
|
||||
tx-num-evt = <32>;
|
||||
rx-num-evt = <32>;
|
||||
status = "okay";
|
||||
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&mmc1_pins_default>;
|
||||
pinctrl-1 = <&mmc1_pins_sleep>;
|
||||
cd-gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <&vdd_3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&nand0 {
|
||||
partition@0 {
|
||||
label = "MLO";
|
||||
reg = <0x00000 0x20000>;
|
||||
};
|
||||
|
||||
partition@20000 {
|
||||
label = "boot";
|
||||
reg = <0x20000 0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
&tscadc {
|
||||
status = "okay";
|
||||
|
||||
adc: adc {
|
||||
ti,adc-channels = <0 1 2 3 4 5 6>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&uart1_pins_default>;
|
||||
pinctrl-1 = <&uart1_pins_sleep>;
|
||||
linux,rs485-enabled-at-boot-time;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&uart2_pins_default>;
|
||||
pinctrl-1 = <&uart2_pins_sleep>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb_pins>;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "otg";
|
||||
};
|
||||
|
||||
&usb0_phy {
|
||||
vcc-supply = <&vdd_5v0>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&usb1_phy {
|
||||
vcc-supply = <&vdd_5v0>;
|
||||
};
|
||||
|
||||
&vdd_mod {
|
||||
vin-supply = <&vdd_3v3>;
|
||||
};
|
||||
|
||||
&am33xx_pinmux {
|
||||
dcan0_pins_default: pinmux_dcan0_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE2) /* dcan0_tx_mux2 */
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT, MUX_MODE2) /* dcan0_rx_mux2 */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan0_pins_sleep: pinmux_dcan0_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_pins_default: pinmux_dcan1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2) /* dcan1_tx_mux0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE2) /* dcan1_rx_mux0 */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_pins_sleep: pinmux_dcan1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
ehrpwm0_pins_default: pinmux_ehrpwm0_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_OUTPUT, MUX_MODE3) /* ehrpwm0A_mux1 */
|
||||
>;
|
||||
};
|
||||
|
||||
ehrpwm0_pins_sleep: pinmux_ehrpwm0_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
eth_slave2_pins_default: pinmux_eth_slave2_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_tctl */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rctl */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td3 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td2 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td1 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_tclk */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rclk */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rd3 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rd2 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2 /* rgmii2_rd1 */)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2 /* rgmii2_rd0 */)
|
||||
>;
|
||||
};
|
||||
|
||||
eth_slave2_pins_sleep: pinmux_eth_slave2_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
gpio_buttons_pins: pinmux_gpio_buttons_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpio3[0] */
|
||||
AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT, MUX_MODE7) /* gpio0[29] */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins_default: pinmux_i2c1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE2) /* I2C1_SDA_mux3 */
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE2) /* I2C1_SCL_mux3 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins_gpio: pinmux_i2c1_pins_gpio {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE7) /* gpio0[4] */
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT, MUX_MODE7) /* gpio0[5] */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins_sleep: pinmux_i2c1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
lcdc_pins_default: pinmux_lcdc_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) /* lcd_data0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) /* lcd_data1 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) /* lcd_data2 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) /* lcd_data3 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) /* lcd_data4 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) /* lcd_data5 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) /* lcd_data6 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) /* lcd_data7 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) /* lcd_data8 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) /* lcd_data9 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) /* lcd_data10 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) /* lcd_data11 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) /* lcd_data12 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) /* lcd_data13 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) /* lcd_data14 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) /* lcd_data15 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0) /* lcd_vsync */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0) /* lcd_hsync */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0) /* lcd_pclk */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0) /* lcd_ac_bias_en */
|
||||
>;
|
||||
};
|
||||
|
||||
lcdc_pins_sleep: pinmux_lcdc_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
leds_pins: pinmux_leds_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* gpio0[27] */
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE7) /* gpio0[3] */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp0_pins_default: pinmux_mcasp0_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_aclkx_mux0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_fsx_mux0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mcasp0_axr2_mux0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_axr1_mux0 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp0_pins_sleep: pinmux_mcasp0_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_default: pinmux_mmc1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat3 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat2 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat1 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_clk */
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_cmd */
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE7) /* gpio3[21] */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) /* uart0_rxd */
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins_default: pinmux_uart1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0) /* uart1_rxd */
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* uart1_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins_sleep: pinmux_uart1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins_default: pinmux_uart2_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT, MUX_MODE6) /* uart2_rxd_mux1 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_OUTPUT, MUX_MODE6) /* uart2_txd_mux1 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins_sleep: pinmux_uart2_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
usb_pins: pinmux_usb_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_USB0_DRVVBUS, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* USB0_DRVVBUS */
|
||||
AM33XX_PADCONF(AM335X_PIN_USB1_DRVVBUS, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* USB1_DRVVBUS */
|
||||
>;
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue