ARM: dts: imx6: Add DFI FS700-M60 board support
The DFI FS700-M60 is a q7 board with i.MX6 quad, dual, duallite or solo SoC. This adds support for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Sascha Hauer
Shawn Guo
parent
98ea6ad2ed
commit
420127e5a5
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@ -153,6 +153,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
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imx53-qsb.dtb \
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imx53-qsb.dtb \
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imx53-smd.dtb \
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imx53-smd.dtb \
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imx6dl-cubox-i.dtb \
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imx6dl-cubox-i.dtb \
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imx6dl-dfi-fs700-m60.dtb \
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imx6dl-gw51xx.dtb \
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imx6dl-gw51xx.dtb \
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imx6dl-gw52xx.dtb \
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imx6dl-gw52xx.dtb \
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imx6dl-gw53xx.dtb \
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imx6dl-gw53xx.dtb \
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@ -166,6 +167,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
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imx6q-arm2.dtb \
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imx6q-arm2.dtb \
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imx6q-cm-fx6.dtb \
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imx6q-cm-fx6.dtb \
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imx6q-cubox-i.dtb \
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imx6q-cubox-i.dtb \
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imx6q-dfi-fs700-m60.dtb \
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imx6q-dmo-edmqmx6.dtb \
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imx6q-dmo-edmqmx6.dtb \
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imx6q-gw51xx.dtb \
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imx6q-gw51xx.dtb \
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imx6q-gw52xx.dtb \
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imx6q-gw52xx.dtb \
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@ -0,0 +1,23 @@
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/*
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* Copyright 2013 Sascha Hauer <s.hauer@pengutronix.de>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#ifndef __DTS_V1__
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#define __DTS_V1__
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/dts-v1/;
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#endif
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#include "imx6dl.dtsi"
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#include "imx6qdl-dfi-fs700-m60.dtsi"
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/ {
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model = "DFI FS700-M60-6DL i.MX6dl Q7 Board";
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compatible = "dfi,fs700-m60-6dl", "dfi,fs700e-m60", "fsl,imx6dl";
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};
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@ -0,0 +1,23 @@
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/*
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* Copyright 2013 Sascha Hauer <s.hauer@pengutronix.de>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#ifndef __DTS_V1__
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#define __DTS_V1__
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/dts-v1/;
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#endif
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#include "imx6q.dtsi"
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#include "imx6qdl-dfi-fs700-m60.dtsi"
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/ {
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model = "DFI FS700-M60-6QD i.MX6qd Q7 Board";
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compatible = "dfi,fs700-m60-6qd", "dfi,fs700e-m60", "fsl,imx6q";
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};
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@ -0,0 +1,199 @@
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/ {
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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dummy_reg: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "dummy-supply";
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};
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reg_usb_otg_vbus: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 0>;
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enable-active-high;
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};
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};
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chosen {
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linux,stdout-path = &uart1;
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};
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};
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&ecspi3 {
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fsl,spi-num-chipselects = <1>;
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cs-gpios = <&gpio4 24 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi3>;
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status = "okay";
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flash: m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "sst,sst25vf040b", "m25p80";
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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status = "okay";
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phy-mode = "rgmii";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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imx6qdl-dfi-fs700-m60 {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
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MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 /* PMIC irq */
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MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000 /* MAX11801 irq */
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MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000030b0 /* Backlight enable */
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
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>;
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};
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pinctrl_usbotg: usbotggrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
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MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
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MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
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MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
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MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
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MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
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MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 /* card detect */
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
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>;
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};
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pinctrl_usdhc4: usdhc4grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
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MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
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MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
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MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
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MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
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MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
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MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
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MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
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MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
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MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
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>;
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};
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pinctrl_ecspi3: ecspi3grp {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
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MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
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MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
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MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
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>;
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};
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};
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&usbh1 {
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status = "okay";
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};
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&usbotg {
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vbus-supply = <®_usb_otg_vbus>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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disable-over-current;
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dr_mode = "host";
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status = "okay";
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};
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&usdhc2 { /* module slot */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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cd-gpios = <&gpio2 2 0>;
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status = "okay";
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};
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&usdhc3 { /* baseboard slot */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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};
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&usdhc4 { /* eMMC */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc4>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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