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watchdog: sp5100_tco: Write back the original value to reserved bits, instead of zero 

In case of SP5100 or SB7x0 chipsets, the sp5100_tco module writes zero to
reserved bits. The module, however, shouldn't depend on specific default
value, and should perform a read-merge-write operation for the reserved
bits.

This patch makes the sp5100_tco module perform a read-merge-write operation
on all the chipset (sp5100, sb7x0, sb8x0 or later).

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43176
Signed-off-by: Takahisa Tanaka <mc74hc00@gmail.com>
Tested-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Cc: stable <stable@vger.kernel.org>
This commit is contained in:
Takahisa Tanaka 2013-01-14 11:01:58 +09:00 committed by Wim Van Sebroeck
parent 10ab329b5d
commit 41adafbd7b
1 changed files with 8 additions and 20 deletions
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28
drivers/watchdog/sp5100_tco.c
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@ -361,7 +361,7 @@ static unsigned char sp5100_tco_setupdevice(void)
{
struct pci_dev *dev = NULL;
const char *dev_name = NULL;
u32 val;
u32 val, tmp_val;
u32 index_reg, data_reg, base_addr;
/* Match the PCI device */
@ -497,31 +497,19 @@ static unsigned char sp5100_tco_setupdevice(void)
pr_debug("Got 0x%04x from resource tree\n", val);
}
/* Restore to the low three bits, if chipset is SB8x0(or later) */
if (sp5100_tco_pci->revision >= 0x40) {
u8 reserved_bit;
outb(base_addr+0, index_reg);
reserved_bit = inb(data_reg) & 0x7;
val |= (u32)reserved_bit;
}
/* Restore to the low three bits */
outb(base_addr+0, index_reg);
tmp_val = val | (inb(data_reg) & 0x7);
/* Re-programming the watchdog timer base address */
outb(base_addr+0, index_reg);
/* Low three bits of BASE are reserved */
outb((val >> 0) & 0xff, data_reg);
outb((tmp_val >> 0) & 0xff, data_reg);
outb(base_addr+1, index_reg);
outb((val >> 8) & 0xff, data_reg);
outb((tmp_val >> 8) & 0xff, data_reg);
outb(base_addr+2, index_reg);
outb((val >> 16) & 0xff, data_reg);
outb((tmp_val >> 16) & 0xff, data_reg);
outb(base_addr+3, index_reg);
outb((val >> 24) & 0xff, data_reg);
/*
* Clear unnecessary the low three bits,
* if chipset is SB8x0(or later)
*/
if (sp5100_tco_pci->revision >= 0x40)
val &= ~0x7;
outb((tmp_val >> 24) & 0xff, data_reg);
if (!request_mem_region_exclusive(val, SP5100_WDT_MEM_MAP_SIZE,
dev_name)) {