drm/amdgpu: avoid using invalidate semaphore for picasso

It may cause timeout waiting for sem acquire in VM flush when using
invalidate semaphore for picasso. So it needs to avoid using invalidate
semaphore for piasso.

Signed-off-by: changzhu <Changfeng.Zhu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
changzhu 2019-12-10 10:23:09 +08:00 committed by Alex Deucher
parent feffbaac36
commit 418899d615
1 changed files with 20 additions and 8 deletions

View File

@ -468,8 +468,11 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
*/ */
/* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */ /* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */
if (vmhub == AMDGPU_MMHUB_0 || if ((vmhub == AMDGPU_MMHUB_0 ||
vmhub == AMDGPU_MMHUB_1) { vmhub == AMDGPU_MMHUB_1) &&
(!(adev->asic_type == CHIP_RAVEN &&
adev->rev_id < 0x8 &&
adev->pdev->device == 0x15d8))) {
for (j = 0; j < adev->usec_timeout; j++) { for (j = 0; j < adev->usec_timeout; j++) {
/* a read return value of 1 means semaphore acuqire */ /* a read return value of 1 means semaphore acuqire */
tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng); tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng);
@ -499,8 +502,11 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
} }
/* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */ /* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */
if (vmhub == AMDGPU_MMHUB_0 || if ((vmhub == AMDGPU_MMHUB_0 ||
vmhub == AMDGPU_MMHUB_1) vmhub == AMDGPU_MMHUB_1) &&
(!(adev->asic_type == CHIP_RAVEN &&
adev->rev_id < 0x8 &&
adev->pdev->device == 0x15d8)))
/* /*
* add semaphore release after invalidation, * add semaphore release after invalidation,
* write with 0 means semaphore release * write with 0 means semaphore release
@ -531,8 +537,11 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
*/ */
/* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */ /* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */
if (ring->funcs->vmhub == AMDGPU_MMHUB_0 || if ((ring->funcs->vmhub == AMDGPU_MMHUB_0 ||
ring->funcs->vmhub == AMDGPU_MMHUB_1) ring->funcs->vmhub == AMDGPU_MMHUB_1) &&
(!(adev->asic_type == CHIP_RAVEN &&
adev->rev_id < 0x8 &&
adev->pdev->device == 0x15d8)))
/* a read return value of 1 means semaphore acuqire */ /* a read return value of 1 means semaphore acuqire */
amdgpu_ring_emit_reg_wait(ring, amdgpu_ring_emit_reg_wait(ring,
hub->vm_inv_eng0_sem + eng, 0x1, 0x1); hub->vm_inv_eng0_sem + eng, 0x1, 0x1);
@ -548,8 +557,11 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
req, 1 << vmid); req, 1 << vmid);
/* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */ /* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */
if (ring->funcs->vmhub == AMDGPU_MMHUB_0 || if ((ring->funcs->vmhub == AMDGPU_MMHUB_0 ||
ring->funcs->vmhub == AMDGPU_MMHUB_1) ring->funcs->vmhub == AMDGPU_MMHUB_1) &&
(!(adev->asic_type == CHIP_RAVEN &&
adev->rev_id < 0x8 &&
adev->pdev->device == 0x15d8)))
/* /*
* add semaphore release after invalidation, * add semaphore release after invalidation,
* write with 0 means semaphore release * write with 0 means semaphore release