ath9k: configure internal regulator for AR9330
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -3712,7 +3712,7 @@ static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
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ath9k_hw_ar9300_get_eeprom(ah, EEP_INTERNAL_REGULATOR);
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if (internal_regulator) {
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if (AR_SREV_9485(ah)) {
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if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
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int reg_pmu_set;
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reg_pmu_set = REG_READ(ah, AR_PHY_PMU2) & ~AR_PHY_PMU2_PGM;
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@ -3720,9 +3720,24 @@ static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
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if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set))
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return;
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reg_pmu_set = (5 << 1) | (7 << 4) | (1 << 8) |
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(2 << 14) | (6 << 17) | (1 << 20) |
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(3 << 24) | (1 << 28);
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if (AR_SREV_9330(ah)) {
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if (ah->is_clk_25mhz) {
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reg_pmu_set = (3 << 1) | (8 << 4) |
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(3 << 8) | (1 << 14) |
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(6 << 17) | (1 << 20) |
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(3 << 24);
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} else {
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reg_pmu_set = (4 << 1) | (7 << 4) |
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(3 << 8) | (1 << 14) |
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(6 << 17) | (1 << 20) |
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(3 << 24);
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}
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} else {
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reg_pmu_set = (5 << 1) | (7 << 4) |
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(1 << 8) | (2 << 14) |
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(6 << 17) | (1 << 20) |
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(3 << 24) | (1 << 28);
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}
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REG_WRITE(ah, AR_PHY_PMU1, reg_pmu_set);
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if (!is_pmu_set(ah, AR_PHY_PMU1, reg_pmu_set))
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@ -3753,7 +3768,7 @@ static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
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AR_RTC_REG_CONTROL1_SWREG_PROGRAM);
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}
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} else {
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if (AR_SREV_9485(ah)) {
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if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
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REG_RMW_FIELD(ah, AR_PHY_PMU2, AR_PHY_PMU2_PGM, 0);
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while (REG_READ_FIELD(ah, AR_PHY_PMU2,
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AR_PHY_PMU2_PGM))
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