TTY: rocket, fix more no-PCI warnings
Commit "TTY: rocket, fix compilation warning" fixed a compilation warning, but there was still a problem with !CONFIG_PCI configs. So fix them for good by coupling the PCI functions together and moving them inside a common #ifdef. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Jiri Slaby
Greg Kroah-Hartman
parent
2b359172e0
commit
416187caed
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@ -150,12 +150,14 @@ static Word_t aiop_intr_bits[AIOP_CTL_SIZE] = {
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AIOP_INTR_BIT_3
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AIOP_INTR_BIT_3
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};
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};
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#ifdef CONFIG_PCI
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static Word_t upci_aiop_intr_bits[AIOP_CTL_SIZE] = {
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static Word_t upci_aiop_intr_bits[AIOP_CTL_SIZE] = {
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UPCI_AIOP_INTR_BIT_0,
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UPCI_AIOP_INTR_BIT_0,
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UPCI_AIOP_INTR_BIT_1,
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UPCI_AIOP_INTR_BIT_1,
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UPCI_AIOP_INTR_BIT_2,
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UPCI_AIOP_INTR_BIT_2,
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UPCI_AIOP_INTR_BIT_3
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UPCI_AIOP_INTR_BIT_3
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};
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};
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#endif
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static Byte_t RData[RDATASIZE] = {
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static Byte_t RData[RDATASIZE] = {
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0x00, 0x09, 0xf6, 0x82,
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0x00, 0x09, 0xf6, 0x82,
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@ -227,7 +229,6 @@ static unsigned long nextLineNumber;
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static int __init init_ISA(int i);
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static int __init init_ISA(int i);
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static void rp_wait_until_sent(struct tty_struct *tty, int timeout);
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static void rp_wait_until_sent(struct tty_struct *tty, int timeout);
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static void rp_flush_buffer(struct tty_struct *tty);
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static void rp_flush_buffer(struct tty_struct *tty);
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static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model);
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static unsigned char GetLineNumber(int ctrl, int aiop, int ch);
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static unsigned char GetLineNumber(int ctrl, int aiop, int ch);
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static unsigned char SetLineNumber(int ctrl, int aiop, int ch);
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static unsigned char SetLineNumber(int ctrl, int aiop, int ch);
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static void rp_start(struct tty_struct *tty);
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static void rp_start(struct tty_struct *tty);
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@ -241,11 +242,6 @@ static void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags);
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static void sModemReset(CONTROLLER_T * CtlP, int chan, int on);
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static void sModemReset(CONTROLLER_T * CtlP, int chan, int on);
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static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on);
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static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on);
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static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data);
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static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data);
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static int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum,
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ByteIO_t * AiopIOList, int AiopIOListSize,
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WordIO_t ConfigIO, int IRQNum, Byte_t Frequency,
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int PeriodicOnly, int altChanRingIndicator,
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int UPCIRingInd);
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static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
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static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
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ByteIO_t * AiopIOList, int AiopIOListSize,
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ByteIO_t * AiopIOList, int AiopIOListSize,
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int IRQNum, Byte_t Frequency, int PeriodicOnly);
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int IRQNum, Byte_t Frequency, int PeriodicOnly);
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@ -1775,6 +1771,145 @@ static DEFINE_PCI_DEVICE_TABLE(rocket_pci_ids) = {
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};
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};
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MODULE_DEVICE_TABLE(pci, rocket_pci_ids);
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MODULE_DEVICE_TABLE(pci, rocket_pci_ids);
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/* Resets the speaker controller on RocketModem II and III devices */
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static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model)
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{
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ByteIO_t addr;
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/* RocketModem II speaker control is at the 8th port location of offset 0x40 */
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if ((model == MODEL_RP4M) || (model == MODEL_RP6M)) {
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addr = CtlP->AiopIO[0] + 0x4F;
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sOutB(addr, 0);
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}
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/* RocketModem III speaker control is at the 1st port location of offset 0x80 */
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if ((model == MODEL_UPCI_RM3_8PORT)
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|| (model == MODEL_UPCI_RM3_4PORT)) {
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addr = CtlP->AiopIO[0] + 0x88;
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sOutB(addr, 0);
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}
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}
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/***************************************************************************
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Function: sPCIInitController
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Purpose: Initialization of controller global registers and controller
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structure.
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Call: sPCIInitController(CtlP,CtlNum,AiopIOList,AiopIOListSize,
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IRQNum,Frequency,PeriodicOnly)
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CONTROLLER_T *CtlP; Ptr to controller structure
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int CtlNum; Controller number
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ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
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This list must be in the order the AIOPs will be found on the
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controller. Once an AIOP in the list is not found, it is
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assumed that there are no more AIOPs on the controller.
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int AiopIOListSize; Number of addresses in AiopIOList
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int IRQNum; Interrupt Request number. Can be any of the following:
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0: Disable global interrupts
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3: IRQ 3
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4: IRQ 4
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5: IRQ 5
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9: IRQ 9
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10: IRQ 10
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11: IRQ 11
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12: IRQ 12
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15: IRQ 15
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Byte_t Frequency: A flag identifying the frequency
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of the periodic interrupt, can be any one of the following:
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FREQ_DIS - periodic interrupt disabled
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FREQ_137HZ - 137 Hertz
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FREQ_69HZ - 69 Hertz
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FREQ_34HZ - 34 Hertz
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FREQ_17HZ - 17 Hertz
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FREQ_9HZ - 9 Hertz
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FREQ_4HZ - 4 Hertz
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If IRQNum is set to 0 the Frequency parameter is
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overidden, it is forced to a value of FREQ_DIS.
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int PeriodicOnly: 1 if all interrupts except the periodic
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interrupt are to be blocked.
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0 is both the periodic interrupt and
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other channel interrupts are allowed.
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If IRQNum is set to 0 the PeriodicOnly parameter is
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overidden, it is forced to a value of 0.
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Return: int: Number of AIOPs on the controller, or CTLID_NULL if controller
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initialization failed.
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Comments:
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If periodic interrupts are to be disabled but AIOP interrupts
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are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
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If interrupts are to be completely disabled set IRQNum to 0.
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Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
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invalid combination.
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This function performs initialization of global interrupt modes,
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but it does not actually enable global interrupts. To enable
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and disable global interrupts use functions sEnGlobalInt() and
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sDisGlobalInt(). Enabling of global interrupts is normally not
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done until all other initializations are complete.
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Even if interrupts are globally enabled, they must also be
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individually enabled for each channel that is to generate
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interrupts.
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Warnings: No range checking on any of the parameters is done.
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No context switches are allowed while executing this function.
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After this function all AIOPs on the controller are disabled,
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they can be enabled with sEnAiop().
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*/
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static int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum,
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ByteIO_t * AiopIOList, int AiopIOListSize,
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WordIO_t ConfigIO, int IRQNum, Byte_t Frequency,
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int PeriodicOnly, int altChanRingIndicator,
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int UPCIRingInd)
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{
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int i;
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ByteIO_t io;
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CtlP->AltChanRingIndicator = altChanRingIndicator;
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CtlP->UPCIRingInd = UPCIRingInd;
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CtlP->CtlNum = CtlNum;
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CtlP->CtlID = CTLID_0001; /* controller release 1 */
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CtlP->BusType = isPCI; /* controller release 1 */
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if (ConfigIO) {
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CtlP->isUPCI = 1;
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CtlP->PCIIO = ConfigIO + _PCI_9030_INT_CTRL;
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CtlP->PCIIO2 = ConfigIO + _PCI_9030_GPIO_CTRL;
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CtlP->AiopIntrBits = upci_aiop_intr_bits;
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} else {
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CtlP->isUPCI = 0;
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CtlP->PCIIO =
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(WordIO_t) ((ByteIO_t) AiopIOList[0] + _PCI_INT_FUNC);
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CtlP->AiopIntrBits = aiop_intr_bits;
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}
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sPCIControllerEOI(CtlP); /* clear EOI if warm init */
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/* Init AIOPs */
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CtlP->NumAiop = 0;
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for (i = 0; i < AiopIOListSize; i++) {
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io = AiopIOList[i];
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CtlP->AiopIO[i] = (WordIO_t) io;
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CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
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CtlP->AiopID[i] = sReadAiopID(io); /* read AIOP ID */
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if (CtlP->AiopID[i] == AIOPID_NULL) /* if AIOP does not exist */
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break; /* done looking for AIOPs */
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CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */
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sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE); /* clock prescaler */
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sOutB(io + _INDX_DATA, sClockPrescale);
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CtlP->NumAiop++; /* bump count of AIOPs */
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}
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if (CtlP->NumAiop == 0)
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return (-1);
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else
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return (CtlP->NumAiop);
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}
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/*
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/*
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* Called when a PCI card is found. Retrieves and stores model information,
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* Called when a PCI card is found. Retrieves and stores model information,
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* init's aiopic and serial port hardware.
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* init's aiopic and serial port hardware.
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@ -2519,147 +2654,6 @@ static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
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return (CtlP->NumAiop);
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return (CtlP->NumAiop);
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}
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}
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#ifdef CONFIG_PCI
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/***************************************************************************
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Function: sPCIInitController
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Purpose: Initialization of controller global registers and controller
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structure.
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Call: sPCIInitController(CtlP,CtlNum,AiopIOList,AiopIOListSize,
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IRQNum,Frequency,PeriodicOnly)
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CONTROLLER_T *CtlP; Ptr to controller structure
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int CtlNum; Controller number
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ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
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This list must be in the order the AIOPs will be found on the
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controller. Once an AIOP in the list is not found, it is
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assumed that there are no more AIOPs on the controller.
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int AiopIOListSize; Number of addresses in AiopIOList
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int IRQNum; Interrupt Request number. Can be any of the following:
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0: Disable global interrupts
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3: IRQ 3
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4: IRQ 4
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5: IRQ 5
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9: IRQ 9
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10: IRQ 10
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11: IRQ 11
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12: IRQ 12
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15: IRQ 15
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Byte_t Frequency: A flag identifying the frequency
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of the periodic interrupt, can be any one of the following:
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FREQ_DIS - periodic interrupt disabled
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FREQ_137HZ - 137 Hertz
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FREQ_69HZ - 69 Hertz
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FREQ_34HZ - 34 Hertz
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FREQ_17HZ - 17 Hertz
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FREQ_9HZ - 9 Hertz
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FREQ_4HZ - 4 Hertz
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If IRQNum is set to 0 the Frequency parameter is
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overidden, it is forced to a value of FREQ_DIS.
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int PeriodicOnly: 1 if all interrupts except the periodic
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interrupt are to be blocked.
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0 is both the periodic interrupt and
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other channel interrupts are allowed.
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If IRQNum is set to 0 the PeriodicOnly parameter is
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overidden, it is forced to a value of 0.
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Return: int: Number of AIOPs on the controller, or CTLID_NULL if controller
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initialization failed.
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Comments:
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If periodic interrupts are to be disabled but AIOP interrupts
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are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
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If interrupts are to be completely disabled set IRQNum to 0.
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Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
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invalid combination.
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This function performs initialization of global interrupt modes,
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but it does not actually enable global interrupts. To enable
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and disable global interrupts use functions sEnGlobalInt() and
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sDisGlobalInt(). Enabling of global interrupts is normally not
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done until all other initializations are complete.
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Even if interrupts are globally enabled, they must also be
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individually enabled for each channel that is to generate
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interrupts.
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Warnings: No range checking on any of the parameters is done.
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No context switches are allowed while executing this function.
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After this function all AIOPs on the controller are disabled,
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they can be enabled with sEnAiop().
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*/
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static int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum,
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ByteIO_t * AiopIOList, int AiopIOListSize,
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WordIO_t ConfigIO, int IRQNum, Byte_t Frequency,
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int PeriodicOnly, int altChanRingIndicator,
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int UPCIRingInd)
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{
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int i;
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ByteIO_t io;
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CtlP->AltChanRingIndicator = altChanRingIndicator;
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CtlP->UPCIRingInd = UPCIRingInd;
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CtlP->CtlNum = CtlNum;
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CtlP->CtlID = CTLID_0001; /* controller release 1 */
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CtlP->BusType = isPCI; /* controller release 1 */
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if (ConfigIO) {
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CtlP->isUPCI = 1;
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CtlP->PCIIO = ConfigIO + _PCI_9030_INT_CTRL;
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CtlP->PCIIO2 = ConfigIO + _PCI_9030_GPIO_CTRL;
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CtlP->AiopIntrBits = upci_aiop_intr_bits;
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} else {
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CtlP->isUPCI = 0;
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CtlP->PCIIO =
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(WordIO_t) ((ByteIO_t) AiopIOList[0] + _PCI_INT_FUNC);
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CtlP->AiopIntrBits = aiop_intr_bits;
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}
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sPCIControllerEOI(CtlP); /* clear EOI if warm init */
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/* Init AIOPs */
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CtlP->NumAiop = 0;
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for (i = 0; i < AiopIOListSize; i++) {
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io = AiopIOList[i];
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CtlP->AiopIO[i] = (WordIO_t) io;
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CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
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CtlP->AiopID[i] = sReadAiopID(io); /* read AIOP ID */
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if (CtlP->AiopID[i] == AIOPID_NULL) /* if AIOP does not exist */
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break; /* done looking for AIOPs */
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CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */
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sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE); /* clock prescaler */
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sOutB(io + _INDX_DATA, sClockPrescale);
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CtlP->NumAiop++; /* bump count of AIOPs */
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}
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if (CtlP->NumAiop == 0)
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return (-1);
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else
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return (CtlP->NumAiop);
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}
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/* Resets the speaker controller on RocketModem II and III devices */
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static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model)
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{
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ByteIO_t addr;
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/* RocketModem II speaker control is at the 8th port location of offset 0x40 */
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if ((model == MODEL_RP4M) || (model == MODEL_RP6M)) {
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addr = CtlP->AiopIO[0] + 0x4F;
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sOutB(addr, 0);
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}
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/* RocketModem III speaker control is at the 1st port location of offset 0x80 */
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if ((model == MODEL_UPCI_RM3_8PORT)
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|| (model == MODEL_UPCI_RM3_4PORT)) {
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|
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addr = CtlP->AiopIO[0] + 0x88;
|
|
||||||
sOutB(addr, 0);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/***************************************************************************
|
/***************************************************************************
|
||||||
Function: sReadAiopID
|
Function: sReadAiopID
|
||||||
Purpose: Read the AIOP idenfication number directly from an AIOP.
|
Purpose: Read the AIOP idenfication number directly from an AIOP.
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue