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rt2800: 5592: iq calibration for 5GHz 

Based on:
RT5592_IQCalibration()

DPO_RT5572_LinuxSTA_2.6.1.3_20121022/cips/rt5592.c

Signed-off-by: Stanislaw Gruszka <stf_xl@wp.pl>
Tested-by: Wanlong Gao <gaowanlong@cn.fujitsu.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Stanislaw Gruszka 2013-03-16 19:19:52 +01:00 committed by John W. Linville
parent 939ec51dc7
commit 415e3f2f7b
1 changed files with 60 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

70
drivers/net/wireless/rt2x00/rt2800lib.c
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@ -2468,31 +2468,80 @@ static void rt2800_bbp_write_with_rx_chain(struct rt2x00_dev *rt2x00dev,
}
}
static void rt2800_iq_calibrate(struct rt2x00_dev *rt2x00dev, int channel)
{
u8 cal;
/* TODO */
if (WARN_ON_ONCE(channel > 14))
return;
/* TX0 IQ Gain */
rt2800_bbp_write(rt2x00dev, 158, 0x2c);
cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_GAIN_CAL_TX0_2G);
if (channel <= 14)
cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_GAIN_CAL_TX0_2G);
else if (channel >= 36 && channel <= 64)
cal = rt2x00_eeprom_byte(rt2x00dev,
EEPROM_IQ_GAIN_CAL_TX0_CH36_TO_CH64_5G);
else if (channel >= 100 && channel <= 138)
cal = rt2x00_eeprom_byte(rt2x00dev,
EEPROM_IQ_GAIN_CAL_TX0_CH100_TO_CH138_5G);
else if (channel >= 140 && channel <= 165)
cal = rt2x00_eeprom_byte(rt2x00dev,
EEPROM_IQ_GAIN_CAL_TX0_CH140_TO_CH165_5G);
else
cal = 0;
rt2800_bbp_write(rt2x00dev, 159, cal);
/* TX0 IQ Phase */
rt2800_bbp_write(rt2x00dev, 158, 0x2d);
cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_PHASE_CAL_TX0_2G);
if (channel <= 14)
cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_PHASE_CAL_TX0_2G);
else if (channel >= 36 && channel <= 64)
cal = rt2x00_eeprom_byte(rt2x00dev,
EEPROM_IQ_PHASE_CAL_TX0_CH36_TO_CH64_5G);
else if (channel >= 100 && channel <= 138)
cal = rt2x00_eeprom_byte(rt2x00dev,
EEPROM_IQ_PHASE_CAL_TX0_CH100_TO_CH138_5G);
else if (channel >= 140 && channel <= 165)
cal = rt2x00_eeprom_byte(rt2x00dev,
EEPROM_IQ_PHASE_CAL_TX0_CH140_TO_CH165_5G);
else
cal = 0;
rt2800_bbp_write(rt2x00dev, 159, cal);
/* TX1 IQ Gain */
rt2800_bbp_write(rt2x00dev, 158, 0x4a);
cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_GAIN_CAL_TX1_2G);
if (channel <= 14)
cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_GAIN_CAL_TX1_2G);
else if (channel >= 36 && channel <= 64)
cal = rt2x00_eeprom_byte(rt2x00dev,
EEPROM_IQ_GAIN_CAL_TX1_CH36_TO_CH64_5G);
else if (channel >= 100 && channel <= 138)
cal = rt2x00_eeprom_byte(rt2x00dev,
EEPROM_IQ_GAIN_CAL_TX1_CH100_TO_CH138_5G);
else if (channel >= 140 && channel <= 165)
cal = rt2x00_eeprom_byte(rt2x00dev,
EEPROM_IQ_GAIN_CAL_TX1_CH140_TO_CH165_5G);
else
cal = 0;
rt2800_bbp_write(rt2x00dev, 159, cal);
/* TX1 IQ Phase */
rt2800_bbp_write(rt2x00dev, 158, 0x4b);
cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_PHASE_CAL_TX1_2G);
if (channel <= 14)
cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_PHASE_CAL_TX1_2G);
else if (channel >= 36 && channel <= 64)
cal = rt2x00_eeprom_byte(rt2x00dev,
EEPROM_IQ_PHASE_CAL_TX1_CH36_TO_CH64_5G);
else if (channel >= 100 && channel <= 138)
cal = rt2x00_eeprom_byte(rt2x00dev,
EEPROM_IQ_PHASE_CAL_TX1_CH100_TO_CH138_5G);
else if (channel >= 140 && channel <= 165)
cal = rt2x00_eeprom_byte(rt2x00dev,
EEPROM_IQ_PHASE_CAL_TX1_CH140_TO_CH165_5G);
else
cal = 0;
rt2800_bbp_write(rt2x00dev, 159, cal);
/* FIXME: possible RX0, RX1 callibration ? */
/* RF IQ compensation control */
rt2800_bbp_write(rt2x00dev, 158, 0x04);
cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_RF_IQ_COMPENSATION_CONTROL);
@ -2500,7 +2549,8 @@ static void rt2800_iq_calibrate(struct rt2x00_dev *rt2x00dev, int channel)
/* RF IQ imbalance compensation control */
rt2800_bbp_write(rt2x00dev, 158, 0x03);
cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CONTROL);
cal = rt2x00_eeprom_byte(rt2x00dev,
EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CONTROL);
rt2800_bbp_write(rt2x00dev, 159, cal != 0xff ? cal : 0);
}