iommu/vt-d: Fix RID2PASID setup/teardown failure
The IOMMU driver shares the pasid table for PCI alias devices. When the
RID2PASID entry of the shared pasid table has been filled by the first
device, the subsequent device will encounter the "DMAR: Setup RID2PASID
failed" failure as the pasid entry has already been marked as present.
As the result, the IOMMU probing process will be aborted.
On the contrary, when any alias device is hot-removed from the system,
for example, by writing to /sys/bus/pci/devices/.../remove, the shared
RID2PASID will be cleared without any notifications to other devices.
As the result, any DMAs from those rest devices are blocked.
Sharing pasid table among PCI alias devices could save two memory pages
for devices underneath the PCIe-to-PCI bridges. Anyway, considering that
those devices are rare on modern platforms that support VT-d in scalable
mode and the saved memory is negligible, it's reasonable to remove this
part of immature code to make the driver feasible and stable.
Fixes: ef848b7e5a
("iommu/vt-d: Setup pasid entry for RID2PASID support")
Reported-by: Chenyi Qiang <chenyi.qiang@intel.com>
Reported-by: Ethan Zhao <haifeng.zhao@linux.intel.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Ethan Zhao <haifeng.zhao@linux.intel.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220623065720.727849-1-baolu.lu@linux.intel.com
Link: https://lore.kernel.org/r/20220625133430.2200315-2-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
parent
316f92a705
commit
4140d77a02
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@ -320,30 +320,6 @@ EXPORT_SYMBOL_GPL(intel_iommu_gfx_mapped);
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DEFINE_SPINLOCK(device_domain_lock);
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static LIST_HEAD(device_domain_list);
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/*
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* Iterate over elements in device_domain_list and call the specified
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* callback @fn against each element.
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*/
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int for_each_device_domain(int (*fn)(struct device_domain_info *info,
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void *data), void *data)
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{
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int ret = 0;
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unsigned long flags;
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struct device_domain_info *info;
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spin_lock_irqsave(&device_domain_lock, flags);
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list_for_each_entry(info, &device_domain_list, global) {
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ret = fn(info, data);
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if (ret) {
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spin_unlock_irqrestore(&device_domain_lock, flags);
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return ret;
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}
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}
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spin_unlock_irqrestore(&device_domain_lock, flags);
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return 0;
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}
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const struct iommu_ops intel_iommu_ops;
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static bool translation_pre_enabled(struct intel_iommu *iommu)
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@ -86,54 +86,6 @@ void vcmd_free_pasid(struct intel_iommu *iommu, u32 pasid)
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/*
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* Per device pasid table management:
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*/
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static inline void
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device_attach_pasid_table(struct device_domain_info *info,
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struct pasid_table *pasid_table)
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{
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info->pasid_table = pasid_table;
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list_add(&info->table, &pasid_table->dev);
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}
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static inline void
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device_detach_pasid_table(struct device_domain_info *info,
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struct pasid_table *pasid_table)
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{
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info->pasid_table = NULL;
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list_del(&info->table);
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}
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struct pasid_table_opaque {
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struct pasid_table **pasid_table;
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int segment;
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int bus;
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int devfn;
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};
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static int search_pasid_table(struct device_domain_info *info, void *opaque)
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{
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struct pasid_table_opaque *data = opaque;
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if (info->iommu->segment == data->segment &&
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info->bus == data->bus &&
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info->devfn == data->devfn &&
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info->pasid_table) {
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*data->pasid_table = info->pasid_table;
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return 1;
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}
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return 0;
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}
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static int get_alias_pasid_table(struct pci_dev *pdev, u16 alias, void *opaque)
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{
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struct pasid_table_opaque *data = opaque;
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data->segment = pci_domain_nr(pdev->bus);
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data->bus = PCI_BUS_NUM(alias);
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data->devfn = alias & 0xff;
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return for_each_device_domain(&search_pasid_table, data);
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}
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/*
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* Allocate a pasid table for @dev. It should be called in a
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@ -143,28 +95,18 @@ int intel_pasid_alloc_table(struct device *dev)
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{
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struct device_domain_info *info;
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struct pasid_table *pasid_table;
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struct pasid_table_opaque data;
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struct page *pages;
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u32 max_pasid = 0;
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int ret, order;
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int size;
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int order, size;
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might_sleep();
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info = dev_iommu_priv_get(dev);
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if (WARN_ON(!info || !dev_is_pci(dev) || info->pasid_table))
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return -EINVAL;
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/* DMA alias device already has a pasid table, use it: */
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data.pasid_table = &pasid_table;
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ret = pci_for_each_dma_alias(to_pci_dev(dev),
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&get_alias_pasid_table, &data);
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if (ret)
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goto attach_out;
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pasid_table = kzalloc(sizeof(*pasid_table), GFP_KERNEL);
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if (!pasid_table)
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return -ENOMEM;
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INIT_LIST_HEAD(&pasid_table->dev);
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if (info->pasid_supported)
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max_pasid = min_t(u32, pci_max_pasids(to_pci_dev(dev)),
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@ -182,9 +124,7 @@ int intel_pasid_alloc_table(struct device *dev)
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pasid_table->table = page_address(pages);
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pasid_table->order = order;
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pasid_table->max_pasid = 1 << (order + PAGE_SHIFT + 3);
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attach_out:
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device_attach_pasid_table(info, pasid_table);
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info->pasid_table = pasid_table;
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return 0;
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}
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@ -202,10 +142,7 @@ void intel_pasid_free_table(struct device *dev)
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return;
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pasid_table = info->pasid_table;
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device_detach_pasid_table(info, pasid_table);
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if (!list_empty(&pasid_table->dev))
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return;
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info->pasid_table = NULL;
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/* Free scalable mode PASID directory tables: */
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dir = pasid_table->table;
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@ -74,7 +74,6 @@ struct pasid_table {
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void *table; /* pasid table pointer */
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int order; /* page order of pasid table */
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u32 max_pasid; /* max pasid */
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struct list_head dev; /* device list */
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};
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/* Get PRESENT bit of a PASID directory entry. */
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@ -612,7 +612,6 @@ struct intel_iommu {
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struct device_domain_info {
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struct list_head link; /* link to domain siblings */
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struct list_head global; /* link to global list */
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struct list_head table; /* link to pasid table */
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u32 segment; /* PCI segment number */
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u8 bus; /* PCI bus number */
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u8 devfn; /* PCI devfn number */
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@ -729,8 +728,6 @@ extern int dmar_ir_support(void);
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void *alloc_pgtable_page(int node);
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void free_pgtable_page(void *vaddr);
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struct intel_iommu *domain_get_iommu(struct dmar_domain *domain);
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int for_each_device_domain(int (*fn)(struct device_domain_info *info,
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void *data), void *data);
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void iommu_flush_write_buffer(struct intel_iommu *iommu);
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int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct device *dev);
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struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 *devfn);
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