docs: ABI: change read/write attributes
Unfortunately, (R) and (W) are valid markups for enumerated lists, as described at: https://docutils.sourceforge.io/docs/ref/rst/restructuredtext.html#enumerated-lists So, we ned to replace them by: (R) -> (Read) (W) -> (Write) As otherwise, (R) will be displayed as R., with is not what it is desired. There's no need to touch (RO) and (RW). Acked-by: Jonathan Corbet <corbet@lwn.net> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Link: https://lore.kernel.org/r/6e81ad8064f3ed4f8dc265086fdf1c618043f935.1604042072.git.mchehab+huawei@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -2,7 +2,7 @@ What: /sys/kernel/debug/moxtet/input
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Date: March 2019
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KernelVersion: 5.3
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Contact: Marek Behún <marek.behun@nic.cz>
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Description: (R) Read input from the shift registers, in hexadecimal.
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Description: (Read) Read input from the shift registers, in hexadecimal.
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Returns N+1 bytes, where N is the number of Moxtet connected
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modules. The first byte is from the CPU board itself.
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@ -4,10 +4,11 @@ KernelVersion: 5.8
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Contact: Marek Behún <marek.behun@nic.cz>
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Description:
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=== ===========================================================
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(W) Message to sign with the ECDSA private key stored in
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device's OTP. The message must be exactly 64 bytes (since
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this is intended for SHA-512 hashes).
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(R) The resulting signature, 136 bytes. This contains the R and
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S values of the ECDSA signature, both in big-endian format.
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=== ===========================================================
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======= ===========================================================
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(Write) Message to sign with the ECDSA private key stored in
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device's OTP. The message must be exactly 64 bytes
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(since this is intended for SHA-512 hashes).
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(Read) The resulting signature, 136 bytes. This contains the
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R and S values of the ECDSA signature, both in
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big-endian format.
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======= ===========================================================
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@ -8,50 +8,50 @@ What: /sys/bus/coresight/devices/<cti-name>/powered
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) Indicate if the CTI hardware is powered.
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Description: (Read) Indicate if the CTI hardware is powered.
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What: /sys/bus/coresight/devices/<cti-name>/ctmid
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) Display the associated CTM ID
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Description: (Read) Display the associated CTM ID
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What: /sys/bus/coresight/devices/<cti-name>/nr_trigger_cons
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) Number of devices connected to triggers on this CTI
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Description: (Read) Number of devices connected to triggers on this CTI
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What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/name
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) Name of connected device <N>
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Description: (Read) Name of connected device <N>
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What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_signals
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) Input trigger signals from connected device <N>
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Description: (Read) Input trigger signals from connected device <N>
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What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_types
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) Functional types for the input trigger signals
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Description: (Read) Functional types for the input trigger signals
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from connected device <N>
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What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_signals
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) Output trigger signals to connected device <N>
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Description: (Read) Output trigger signals to connected device <N>
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What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_types
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) Functional types for the output trigger signals
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Description: (Read) Functional types for the output trigger signals
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to connected device <N>
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What: /sys/bus/coresight/devices/<cti-name>/regs/inout_sel
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@ -88,7 +88,7 @@ What: /sys/bus/coresight/devices/<cti-name>/regs/intack
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (W) Write the INTACK register.
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Description: (Write) Write the INTACK register.
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What: /sys/bus/coresight/devices/<cti-name>/regs/appset
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Date: March 2020
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@ -101,99 +101,99 @@ What: /sys/bus/coresight/devices/<cti-name>/regs/appclear
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (W) Write APPCLEAR register to deactivate channel.
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Description: (Write) Write APPCLEAR register to deactivate channel.
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What: /sys/bus/coresight/devices/<cti-name>/regs/apppulse
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (W) Write APPPULSE to pulse a channel active for one clock
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Description: (Write) Write APPPULSE to pulse a channel active for one clock
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cycle.
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What: /sys/bus/coresight/devices/<cti-name>/regs/chinstatus
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) Read current status of channel inputs.
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Description: (Read) Read current status of channel inputs.
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What: /sys/bus/coresight/devices/<cti-name>/regs/choutstatus
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) read current status of channel outputs.
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Description: (Read) read current status of channel outputs.
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What: /sys/bus/coresight/devices/<cti-name>/regs/triginstatus
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) read current status of input trigger signals
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Description: (Read) read current status of input trigger signals
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What: /sys/bus/coresight/devices/<cti-name>/regs/trigoutstatus
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) read current status of output trigger signals.
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Description: (Read) read current status of output trigger signals.
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What: /sys/bus/coresight/devices/<cti-name>/channels/trigin_attach
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (W) Attach a CTI input trigger to a CTM channel.
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Description: (Write) Attach a CTI input trigger to a CTM channel.
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What: /sys/bus/coresight/devices/<cti-name>/channels/trigin_detach
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (W) Detach a CTI input trigger from a CTM channel.
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Description: (Write) Detach a CTI input trigger from a CTM channel.
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What: /sys/bus/coresight/devices/<cti-name>/channels/trigout_attach
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (W) Attach a CTI output trigger to a CTM channel.
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Description: (Write) Attach a CTI output trigger to a CTM channel.
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What: /sys/bus/coresight/devices/<cti-name>/channels/trigout_detach
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (W) Detach a CTI output trigger from a CTM channel.
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Description: (Write) Detach a CTI output trigger from a CTM channel.
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What: /sys/bus/coresight/devices/<cti-name>/channels/chan_gate_enable
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (RW) Enable CTIGATE for single channel (W) or list enabled
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Description: (RW) Enable CTIGATE for single channel (Write) or list enabled
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channels through the gate (R).
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What: /sys/bus/coresight/devices/<cti-name>/channels/chan_gate_disable
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (W) Disable CTIGATE for single channel.
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Description: (Write) Disable CTIGATE for single channel.
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What: /sys/bus/coresight/devices/<cti-name>/channels/chan_set
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (W) Activate a single channel.
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Description: (Write) Activate a single channel.
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What: /sys/bus/coresight/devices/<cti-name>/channels/chan_clear
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (W) Deactivate a single channel.
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Description: (Write) Deactivate a single channel.
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What: /sys/bus/coresight/devices/<cti-name>/channels/chan_pulse
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (W) Pulse a single channel - activate for a single clock cycle.
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Description: (Write) Pulse a single channel - activate for a single clock cycle.
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What: /sys/bus/coresight/devices/<cti-name>/channels/trigout_filtered
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) List of output triggers filtered across all connections.
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Description: (Read) List of output triggers filtered across all connections.
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What: /sys/bus/coresight/devices/<cti-name>/channels/trig_filter_enable
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Date: March 2020
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@ -205,13 +205,13 @@ What: /sys/bus/coresight/devices/<cti-name>/channels/chan_inuse
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) show channels with at least one attached trigger signal.
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Description: (Read) show channels with at least one attached trigger signal.
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What: /sys/bus/coresight/devices/<cti-name>/channels/chan_free
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) show channels with no attached trigger signals.
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Description: (Read) show channels with no attached trigger signals.
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What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_sel
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Date: March 2020
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@ -224,18 +224,18 @@ What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_in
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) Read to see input triggers connected to selected view
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Description: (Read) Read to see input triggers connected to selected view
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channel.
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What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_out
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (R) Read to see output triggers connected to selected view
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Description: (Read) Read to see output triggers connected to selected view
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channel.
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What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_reset
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Date: March 2020
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KernelVersion 5.7
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Contact: Mike Leach or Mathieu Poirier
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Description: (W) Clear all channel / trigger programming.
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Description: (Write) Clear all channel / trigger programming.
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@ -23,21 +23,21 @@ What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/rdp
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Date: March 2016
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KernelVersion: 4.7
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Defines the depth, in words, of the trace RAM in powers of
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Description: (Read) Defines the depth, in words, of the trace RAM in powers of
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2. The value is read directly from HW register RDP, 0x004.
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What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/sts
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Date: March 2016
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KernelVersion: 4.7
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Shows the value held by the ETB status register. The value
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Description: (Read) Shows the value held by the ETB status register. The value
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is read directly from HW register STS, 0x00C.
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What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/rrp
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Date: March 2016
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KernelVersion: 4.7
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Shows the value held by the ETB RAM Read Pointer register
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Description: (Read) Shows the value held by the ETB RAM Read Pointer register
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that is used to read entries from the Trace RAM over the APB
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interface. The value is read directly from HW register RRP,
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0x014.
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@ -46,7 +46,7 @@ What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/rwp
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Date: March 2016
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KernelVersion: 4.7
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Shows the value held by the ETB RAM Write Pointer register
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Description: (Read) Shows the value held by the ETB RAM Write Pointer register
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that is used to sets the write pointer to write entries from
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the CoreSight bus into the Trace RAM. The value is read directly
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from HW register RWP, 0x018.
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@ -55,21 +55,21 @@ What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/trg
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Date: March 2016
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KernelVersion: 4.7
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Similar to "trigger_cntr" above except that this value is
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Description: (Read) Similar to "trigger_cntr" above except that this value is
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read directly from HW register TRG, 0x01C.
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What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/ctl
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Date: March 2016
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KernelVersion: 4.7
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Shows the value held by the ETB Control register. The value
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Description: (Read) Shows the value held by the ETB Control register. The value
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is read directly from HW register CTL, 0x020.
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What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/ffsr
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Date: March 2016
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KernelVersion: 4.7
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Shows the value held by the ETB Formatter and Flush Status
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Description: (Read) Shows the value held by the ETB Formatter and Flush Status
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register. The value is read directly from HW register FFSR,
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0x300.
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Date: March 2016
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KernelVersion: 4.7
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Shows the value held by the ETB Formatter and Flush Control
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Description: (Read) Shows the value held by the ETB Formatter and Flush Control
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register. The value is read directly from HW register FFCR,
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0x304.
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Date: November 2014
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KernelVersion: 3.19
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Provides the number of address comparators pairs accessible
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Description: (Read) Provides the number of address comparators pairs accessible
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on a trace unit, as specified by bit 3:0 of register ETMCCR.
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What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/nr_cntr
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Date: November 2014
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KernelVersion: 3.19
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Provides the number of counters accessible on a trace unit,
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Description: (Read) Provides the number of counters accessible on a trace unit,
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as specified by bit 15:13 of register ETMCCR.
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What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/nr_ctxid_cmp
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Date: November 2014
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KernelVersion: 3.19
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Provides the number of context ID comparator available on a
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Description: (Read) Provides the number of context ID comparator available on a
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trace unit, as specified by bit 25:24 of register ETMCCR.
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What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/reset
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Date: November 2014
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KernelVersion: 3.19
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (W) Cancels all configuration on a trace unit and set it back
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Description: (Write) Cancels all configuration on a trace unit and set it back
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to its boot configuration.
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What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/seq_12_event
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@ -216,7 +216,7 @@ What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/curr_seq_state
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Date: November 2014
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KernelVersion: 3.19
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Holds the current state of the sequencer.
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Description: (Read) Holds the current state of the sequencer.
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What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/sync_freq
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Date: November 2014
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@ -12,75 +12,75 @@ What: /sys/bus/coresight/devices/etm<N>/cpu
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) The CPU this tracing entity is associated with.
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Description: (Read) The CPU this tracing entity is associated with.
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What: /sys/bus/coresight/devices/etm<N>/nr_pe_cmp
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Indicates the number of PE comparator inputs that are
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Description: (Read) Indicates the number of PE comparator inputs that are
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available for tracing.
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What: /sys/bus/coresight/devices/etm<N>/nr_addr_cmp
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Indicates the number of address comparator pairs that are
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Description: (Read) Indicates the number of address comparator pairs that are
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available for tracing.
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What: /sys/bus/coresight/devices/etm<N>/nr_cntr
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Date: April 2015
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KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Indicates the number of counters that are available for
|
||||
Description: (Read) Indicates the number of counters that are available for
|
||||
tracing.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/nr_ext_inp
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Indicates how many external inputs are implemented.
|
||||
Description: (Read) Indicates how many external inputs are implemented.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/numcidc
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Indicates the number of Context ID comparators that are
|
||||
Description: (Read) Indicates the number of Context ID comparators that are
|
||||
available for tracing.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/numvmidc
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Indicates the number of VMID comparators that are available
|
||||
Description: (Read) Indicates the number of VMID comparators that are available
|
||||
for tracing.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/nrseqstate
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Indicates the number of sequencer states that are
|
||||
Description: (Read) Indicates the number of sequencer states that are
|
||||
implemented.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/nr_resource
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Indicates the number of resource selection pairs that are
|
||||
Description: (Read) Indicates the number of resource selection pairs that are
|
||||
available for tracing.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/nr_ss_cmp
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Indicates the number of single-shot comparator controls that
|
||||
Description: (Read) Indicates the number of single-shot comparator controls that
|
||||
are available for tracing.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/reset
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (W) Cancels all configuration on a trace unit and set it back
|
||||
Description: (Write) Cancels all configuration on a trace unit and set it back
|
||||
to its boot configuration.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mode
|
||||
|
@ -300,7 +300,7 @@ What: /sys/bus/coresight/devices/etm<N>/addr_cmp_view
|
|||
Date: December 2019
|
||||
KernelVersion: 5.5
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the current settings for the selected address
|
||||
Description: (Read) Print the current settings for the selected address
|
||||
comparator.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/sshot_idx
|
||||
|
@ -319,7 +319,7 @@ What: /sys/bus/coresight/devices/etm<N>/sshot_status
|
|||
Date: December 2019
|
||||
KernelVersion: 5.5
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the current value of the selected single shot
|
||||
Description: (Read) Print the current value of the selected single shot
|
||||
status register.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/sshot_pe_ctrl
|
||||
|
@ -333,111 +333,111 @@ What: /sys/bus/coresight/devices/etm<N>/mgmt/trcoslsr
|
|||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the content of the OS Lock Status Register (0x304).
|
||||
Description: (Read) Print the content of the OS Lock Status Register (0x304).
|
||||
The value it taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpdcr
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the content of the Power Down Control Register
|
||||
Description: (Read) Print the content of the Power Down Control Register
|
||||
(0x310). The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpdsr
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the content of the Power Down Status Register
|
||||
Description: (Read) Print the content of the Power Down Status Register
|
||||
(0x314). The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mgmt/trclsr
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the content of the SW Lock Status Register
|
||||
Description: (Read) Print the content of the SW Lock Status Register
|
||||
(0xFB4). The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcauthstatus
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the content of the Authentication Status Register
|
||||
Description: (Read) Print the content of the Authentication Status Register
|
||||
(0xFB8). The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcdevid
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the content of the Device ID Register
|
||||
Description: (Read) Print the content of the Device ID Register
|
||||
(0xFC8). The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcdevtype
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the content of the Device Type Register
|
||||
Description: (Read) Print the content of the Device Type Register
|
||||
(0xFCC). The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr0
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the content of the Peripheral ID0 Register
|
||||
Description: (Read) Print the content of the Peripheral ID0 Register
|
||||
(0xFE0). The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr1
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the content of the Peripheral ID1 Register
|
||||
Description: (Read) Print the content of the Peripheral ID1 Register
|
||||
(0xFE4). The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr2
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the content of the Peripheral ID2 Register
|
||||
Description: (Read) Print the content of the Peripheral ID2 Register
|
||||
(0xFE8). The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr3
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the content of the Peripheral ID3 Register
|
||||
Description: (Read) Print the content of the Peripheral ID3 Register
|
||||
(0xFEC). The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcconfig
|
||||
Date: February 2016
|
||||
KernelVersion: 4.07
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the content of the trace configuration register
|
||||
Description: (Read) Print the content of the trace configuration register
|
||||
(0x010) as currently set by SW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mgmt/trctraceid
|
||||
Date: February 2016
|
||||
KernelVersion: 4.07
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Print the content of the trace ID register (0x040).
|
||||
Description: (Read) Print the content of the trace ID register (0x040).
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr0
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Returns the tracing capabilities of the trace unit (0x1E0).
|
||||
Description: (Read) Returns the tracing capabilities of the trace unit (0x1E0).
|
||||
The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr1
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Returns the tracing capabilities of the trace unit (0x1E4).
|
||||
Description: (Read) Returns the tracing capabilities of the trace unit (0x1E4).
|
||||
The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr2
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Returns the maximum size of the data value, data address,
|
||||
Description: (Read) Returns the maximum size of the data value, data address,
|
||||
VMID, context ID and instuction address in the trace unit
|
||||
(0x1E8). The value is taken directly from the HW.
|
||||
|
||||
|
@ -445,7 +445,7 @@ What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr3
|
|||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Returns the value associated with various resources
|
||||
Description: (Read) Returns the value associated with various resources
|
||||
available to the trace unit. See the Trace Macrocell
|
||||
architecture specification for more details (0x1E8).
|
||||
The value is taken directly from the HW.
|
||||
|
@ -454,42 +454,42 @@ What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr4
|
|||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Returns how many resources the trace unit supports (0x1F0).
|
||||
Description: (Read) Returns how many resources the trace unit supports (0x1F0).
|
||||
The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr5
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Returns how many resources the trace unit supports (0x1F4).
|
||||
Description: (Read) Returns how many resources the trace unit supports (0x1F4).
|
||||
The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr8
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Returns the maximum speculation depth of the instruction
|
||||
Description: (Read) Returns the maximum speculation depth of the instruction
|
||||
trace stream. (0x180). The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr9
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Returns the number of P0 right-hand keys that the trace unit
|
||||
Description: (Read) Returns the number of P0 right-hand keys that the trace unit
|
||||
can use (0x184). The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr10
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Returns the number of P1 right-hand keys that the trace unit
|
||||
Description: (Read) Returns the number of P1 right-hand keys that the trace unit
|
||||
can use (0x188). The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr11
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Returns the number of special P1 right-hand keys that the
|
||||
Description: (Read) Returns the number of special P1 right-hand keys that the
|
||||
trace unit can use (0x18C). The value is taken directly from
|
||||
the HW.
|
||||
|
||||
|
@ -497,7 +497,7 @@ What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr12
|
|||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Returns the number of conditional P1 right-hand keys that
|
||||
Description: (Read) Returns the number of conditional P1 right-hand keys that
|
||||
the trace unit can use (0x190). The value is taken directly
|
||||
from the HW.
|
||||
|
||||
|
@ -505,6 +505,6 @@ What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr13
|
|||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Returns the number of special conditional P1 right-hand keys
|
||||
Description: (Read) Returns the number of special conditional P1 right-hand keys
|
||||
that the trace unit can use (0x194). The value is taken
|
||||
directly from the HW.
|
||||
|
|
|
@ -42,7 +42,7 @@ What: /sys/bus/coresight/devices/<memory_map>.stm/status
|
|||
Date: April 2016
|
||||
KernelVersion: 4.7
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) List various control and status registers. The specific
|
||||
Description: (Read) List various control and status registers. The specific
|
||||
layout and content is driver specific.
|
||||
|
||||
What: /sys/bus/coresight/devices/<memory_map>.stm/traceid
|
||||
|
|
|
@ -11,21 +11,21 @@ What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rsz
|
|||
Date: March 2016
|
||||
KernelVersion: 4.7
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Defines the size, in 32-bit words, of the local RAM buffer.
|
||||
Description: (Read) Defines the size, in 32-bit words, of the local RAM buffer.
|
||||
The value is read directly from HW register RSZ, 0x004.
|
||||
|
||||
What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/sts
|
||||
Date: March 2016
|
||||
KernelVersion: 4.7
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Shows the value held by the TMC status register. The value
|
||||
Description: (Read) Shows the value held by the TMC status register. The value
|
||||
is read directly from HW register STS, 0x00C.
|
||||
|
||||
What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rrp
|
||||
Date: March 2016
|
||||
KernelVersion: 4.7
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Shows the value held by the TMC RAM Read Pointer register
|
||||
Description: (Read) Shows the value held by the TMC RAM Read Pointer register
|
||||
that is used to read entries from the Trace RAM over the APB
|
||||
interface. The value is read directly from HW register RRP,
|
||||
0x014.
|
||||
|
@ -34,7 +34,7 @@ What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rwp
|
|||
Date: March 2016
|
||||
KernelVersion: 4.7
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Shows the value held by the TMC RAM Write Pointer register
|
||||
Description: (Read) Shows the value held by the TMC RAM Write Pointer register
|
||||
that is used to sets the write pointer to write entries from
|
||||
the CoreSight bus into the Trace RAM. The value is read directly
|
||||
from HW register RWP, 0x018.
|
||||
|
@ -43,21 +43,21 @@ What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/trg
|
|||
Date: March 2016
|
||||
KernelVersion: 4.7
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Similar to "trigger_cntr" above except that this value is
|
||||
Description: (Read) Similar to "trigger_cntr" above except that this value is
|
||||
read directly from HW register TRG, 0x01C.
|
||||
|
||||
What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ctl
|
||||
Date: March 2016
|
||||
KernelVersion: 4.7
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Shows the value held by the TMC Control register. The value
|
||||
Description: (Read) Shows the value held by the TMC Control register. The value
|
||||
is read directly from HW register CTL, 0x020.
|
||||
|
||||
What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ffsr
|
||||
Date: March 2016
|
||||
KernelVersion: 4.7
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Shows the value held by the TMC Formatter and Flush Status
|
||||
Description: (Read) Shows the value held by the TMC Formatter and Flush Status
|
||||
register. The value is read directly from HW register FFSR,
|
||||
0x300.
|
||||
|
||||
|
@ -65,7 +65,7 @@ What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ffcr
|
|||
Date: March 2016
|
||||
KernelVersion: 4.7
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Shows the value held by the TMC Formatter and Flush Control
|
||||
Description: (Read) Shows the value held by the TMC Formatter and Flush Control
|
||||
register. The value is read directly from HW register FFCR,
|
||||
0x304.
|
||||
|
||||
|
@ -73,7 +73,7 @@ What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/mode
|
|||
Date: March 2016
|
||||
KernelVersion: 4.7
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Shows the value held by the TMC Mode register, which
|
||||
Description: (Read) Shows the value held by the TMC Mode register, which
|
||||
indicate the mode the device has been configured to enact. The
|
||||
The value is read directly from the MODE register, 0x028.
|
||||
|
||||
|
@ -81,7 +81,7 @@ What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/devid
|
|||
Date: March 2016
|
||||
KernelVersion: 4.7
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (R) Indicates the capabilities of the Coresight TMC.
|
||||
Description: (Read) Indicates the capabilities of the Coresight TMC.
|
||||
The value is read directly from the DEVID register, 0xFC8,
|
||||
|
||||
What: /sys/bus/coresight/devices/<memory_map>.tmc/buffer_size
|
||||
|
|
|
@ -2,16 +2,16 @@ What: /sys/bus/moxtet/devices/moxtet-<name>.<addr>/module_description
|
|||
Date: March 2019
|
||||
KernelVersion: 5.3
|
||||
Contact: Marek Behún <marek.behun@nic.cz>
|
||||
Description: (R) Moxtet module description. Format: string
|
||||
Description: (Read) Moxtet module description. Format: string
|
||||
|
||||
What: /sys/bus/moxtet/devices/moxtet-<name>.<addr>/module_id
|
||||
Date: March 2019
|
||||
KernelVersion: 5.3
|
||||
Contact: Marek Behún <marek.behun@nic.cz>
|
||||
Description: (R) Moxtet module ID. Format: %x
|
||||
Description: (Read) Moxtet module ID. Format: %x
|
||||
|
||||
What: /sys/bus/moxtet/devices/moxtet-<name>.<addr>/module_name
|
||||
Date: March 2019
|
||||
KernelVersion: 5.3
|
||||
Contact: Marek Behún <marek.behun@nic.cz>
|
||||
Description: (R) Moxtet module name. Format: string
|
||||
Description: (Read) Moxtet module name. Format: string
|
||||
|
|
|
@ -2,21 +2,21 @@ What: /sys/firmware/turris-mox-rwtm/board_version
|
|||
Date: August 2019
|
||||
KernelVersion: 5.4
|
||||
Contact: Marek Behún <marek.behun@nic.cz>
|
||||
Description: (R) Board version burned into eFuses of this Turris Mox board.
|
||||
Description: (Read) Board version burned into eFuses of this Turris Mox board.
|
||||
Format: %i
|
||||
|
||||
What: /sys/firmware/turris-mox-rwtm/mac_address*
|
||||
Date: August 2019
|
||||
KernelVersion: 5.4
|
||||
Contact: Marek Behún <marek.behun@nic.cz>
|
||||
Description: (R) MAC addresses burned into eFuses of this Turris Mox board.
|
||||
Description: (Read) MAC addresses burned into eFuses of this Turris Mox board.
|
||||
Format: %pM
|
||||
|
||||
What: /sys/firmware/turris-mox-rwtm/pubkey
|
||||
Date: August 2019
|
||||
KernelVersion: 5.4
|
||||
Contact: Marek Behún <marek.behun@nic.cz>
|
||||
Description: (R) ECDSA public key (in pubkey hex compressed form) computed
|
||||
Description: (Read) ECDSA public key (in pubkey hex compressed form) computed
|
||||
as pair to the ECDSA private key burned into eFuses of this
|
||||
Turris Mox Board.
|
||||
Format: string
|
||||
|
@ -25,7 +25,7 @@ What: /sys/firmware/turris-mox-rwtm/ram_size
|
|||
Date: August 2019
|
||||
KernelVersion: 5.4
|
||||
Contact: Marek Behún <marek.behun@nic.cz>
|
||||
Description: (R) RAM size in MiB of this Turris Mox board as was detected
|
||||
Description: (Read) RAM size in MiB of this Turris Mox board as was detected
|
||||
during manufacturing and burned into eFuses. Can be 512 or 1024.
|
||||
Format: %i
|
||||
|
||||
|
@ -33,5 +33,5 @@ What: /sys/firmware/turris-mox-rwtm/serial_number
|
|||
Date: August 2019
|
||||
KernelVersion: 5.4
|
||||
Contact: Marek Behún <marek.behun@nic.cz>
|
||||
Description: (R) Serial number burned into eFuses of this Turris Mox device.
|
||||
Description: (Read) Serial number burned into eFuses of this Turris Mox device.
|
||||
Format: %016X
|
||||
|
|
Loading…
Reference in New Issue