dscc4 endian fixes
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
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5f490c9680
commit
409cd63e6e
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@ -139,19 +139,21 @@ struct thingie {
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};
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struct TxFD {
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u32 state;
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u32 next;
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u32 data;
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u32 complete;
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__le32 state;
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__le32 next;
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__le32 data;
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__le32 complete;
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u32 jiffies; /* Allows sizeof(TxFD) == sizeof(RxFD) + extra hack */
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/* FWIW, datasheet calls that "dummy" and says that card
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* never looks at it; neither does the driver */
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};
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struct RxFD {
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u32 state1;
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u32 next;
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u32 data;
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u32 state2;
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u32 end;
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__le32 state1;
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__le32 next;
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__le32 data;
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__le32 state2;
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__le32 end;
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};
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#define DUMMY_SKB_SIZE 64
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@ -181,7 +183,7 @@ struct RxFD {
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#define SCC_REG_START(dpriv) (SCC_START+(dpriv->dev_id)*SCC_OFFSET)
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struct dscc4_pci_priv {
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u32 *iqcfg;
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__le32 *iqcfg;
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int cfg_cur;
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spinlock_t lock;
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struct pci_dev *pdev;
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@ -197,8 +199,8 @@ struct dscc4_dev_priv {
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struct RxFD *rx_fd;
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struct TxFD *tx_fd;
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u32 *iqrx;
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u32 *iqtx;
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__le32 *iqrx;
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__le32 *iqtx;
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/* FIXME: check all the volatile are required */
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volatile u32 tx_current;
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@ -298,7 +300,7 @@ struct dscc4_dev_priv {
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#define BrrExpMask 0x00000f00
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#define BrrMultMask 0x0000003f
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#define EncodingMask 0x00700000
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#define Hold 0x40000000
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#define Hold cpu_to_le32(0x40000000)
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#define SccBusy 0x10000000
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#define PowerUp 0x80000000
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#define Vis 0x00001000
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@ -307,14 +309,14 @@ struct dscc4_dev_priv {
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#define FrameRdo 0x40
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#define FrameCrc 0x20
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#define FrameRab 0x10
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#define FrameAborted 0x00000200
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#define FrameEnd 0x80000000
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#define DataComplete 0x40000000
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#define FrameAborted cpu_to_le32(0x00000200)
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#define FrameEnd cpu_to_le32(0x80000000)
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#define DataComplete cpu_to_le32(0x40000000)
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#define LengthCheck 0x00008000
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#define SccEvt 0x02000000
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#define NoAck 0x00000200
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#define Action 0x00000001
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#define HiDesc 0x20000000
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#define HiDesc cpu_to_le32(0x20000000)
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/* SCC events */
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#define RxEvt 0xf0000000
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@ -489,8 +491,8 @@ static void dscc4_release_ring(struct dscc4_dev_priv *dpriv)
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skbuff = dpriv->tx_skbuff;
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for (i = 0; i < TX_RING_SIZE; i++) {
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if (*skbuff) {
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pci_unmap_single(pdev, tx_fd->data, (*skbuff)->len,
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PCI_DMA_TODEVICE);
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pci_unmap_single(pdev, le32_to_cpu(tx_fd->data),
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(*skbuff)->len, PCI_DMA_TODEVICE);
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dev_kfree_skb(*skbuff);
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}
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skbuff++;
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@ -500,7 +502,7 @@ static void dscc4_release_ring(struct dscc4_dev_priv *dpriv)
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skbuff = dpriv->rx_skbuff;
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for (i = 0; i < RX_RING_SIZE; i++) {
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if (*skbuff) {
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pci_unmap_single(pdev, rx_fd->data,
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pci_unmap_single(pdev, le32_to_cpu(rx_fd->data),
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RX_MAX(HDLC_MAX_MRU), PCI_DMA_FROMDEVICE);
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dev_kfree_skb(*skbuff);
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}
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@ -522,10 +524,10 @@ static inline int try_get_rx_skb(struct dscc4_dev_priv *dpriv,
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dpriv->rx_skbuff[dirty] = skb;
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if (skb) {
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skb->protocol = hdlc_type_trans(skb, dev);
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rx_fd->data = pci_map_single(dpriv->pci_priv->pdev, skb->data,
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len, PCI_DMA_FROMDEVICE);
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rx_fd->data = cpu_to_le32(pci_map_single(dpriv->pci_priv->pdev,
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skb->data, len, PCI_DMA_FROMDEVICE));
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} else {
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rx_fd->data = (u32) NULL;
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rx_fd->data = 0;
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ret = -1;
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}
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return ret;
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@ -587,7 +589,7 @@ static inline int dscc4_xpr_ack(struct dscc4_dev_priv *dpriv)
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do {
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if (!(dpriv->flags & (NeedIDR | NeedIDT)) ||
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(dpriv->iqtx[cur] & Xpr))
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(dpriv->iqtx[cur] & cpu_to_le32(Xpr)))
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break;
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smp_rmb();
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schedule_timeout_uninterruptible(10);
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@ -650,8 +652,9 @@ static inline void dscc4_rx_skb(struct dscc4_dev_priv *dpriv,
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printk(KERN_DEBUG "%s: skb=0 (%s)\n", dev->name, __FUNCTION__);
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goto refill;
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}
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pkt_len = TO_SIZE(rx_fd->state2);
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pci_unmap_single(pdev, rx_fd->data, RX_MAX(HDLC_MAX_MRU), PCI_DMA_FROMDEVICE);
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pkt_len = TO_SIZE(le32_to_cpu(rx_fd->state2));
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pci_unmap_single(pdev, le32_to_cpu(rx_fd->data),
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RX_MAX(HDLC_MAX_MRU), PCI_DMA_FROMDEVICE);
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if ((skb->data[--pkt_len] & FrameOk) == FrameOk) {
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stats->rx_packets++;
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stats->rx_bytes += pkt_len;
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@ -679,7 +682,7 @@ refill:
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}
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dscc4_rx_update(dpriv, dev);
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rx_fd->state2 = 0x00000000;
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rx_fd->end = 0xbabeface;
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rx_fd->end = cpu_to_le32(0xbabeface);
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}
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static void dscc4_free1(struct pci_dev *pdev)
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@ -772,8 +775,8 @@ static int __devinit dscc4_init_one(struct pci_dev *pdev,
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}
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/* Global interrupt queue */
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writel((u32)(((IRQ_RING_SIZE >> 5) - 1) << 20), ioaddr + IQLENR1);
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priv->iqcfg = (u32 *) pci_alloc_consistent(pdev,
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IRQ_RING_SIZE*sizeof(u32), &priv->iqcfg_dma);
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priv->iqcfg = (__le32 *) pci_alloc_consistent(pdev,
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IRQ_RING_SIZE*sizeof(__le32), &priv->iqcfg_dma);
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if (!priv->iqcfg)
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goto err_free_irq_5;
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writel(priv->iqcfg_dma, ioaddr + IQCFG);
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@ -786,7 +789,7 @@ static int __devinit dscc4_init_one(struct pci_dev *pdev,
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*/
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for (i = 0; i < dev_per_card; i++) {
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dpriv = priv->root + i;
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dpriv->iqtx = (u32 *) pci_alloc_consistent(pdev,
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dpriv->iqtx = (__le32 *) pci_alloc_consistent(pdev,
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IRQ_RING_SIZE*sizeof(u32), &dpriv->iqtx_dma);
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if (!dpriv->iqtx)
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goto err_free_iqtx_6;
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@ -794,7 +797,7 @@ static int __devinit dscc4_init_one(struct pci_dev *pdev,
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}
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for (i = 0; i < dev_per_card; i++) {
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dpriv = priv->root + i;
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dpriv->iqrx = (u32 *) pci_alloc_consistent(pdev,
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dpriv->iqrx = (__le32 *) pci_alloc_consistent(pdev,
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IRQ_RING_SIZE*sizeof(u32), &dpriv->iqrx_dma);
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if (!dpriv->iqrx)
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goto err_free_iqrx_7;
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@ -1156,8 +1159,8 @@ static int dscc4_start_xmit(struct sk_buff *skb, struct net_device *dev)
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dpriv->tx_skbuff[next] = skb;
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tx_fd = dpriv->tx_fd + next;
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tx_fd->state = FrameEnd | TO_STATE_TX(skb->len);
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tx_fd->data = pci_map_single(ppriv->pdev, skb->data, skb->len,
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PCI_DMA_TODEVICE);
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tx_fd->data = cpu_to_le32(pci_map_single(ppriv->pdev, skb->data, skb->len,
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PCI_DMA_TODEVICE));
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tx_fd->complete = 0x00000000;
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tx_fd->jiffies = jiffies;
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mb();
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@ -1508,7 +1511,7 @@ static irqreturn_t dscc4_irq(int irq, void *token)
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if (state & Cfg) {
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if (debug > 0)
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printk(KERN_DEBUG "%s: CfgIV\n", DRV_NAME);
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if (priv->iqcfg[priv->cfg_cur++%IRQ_RING_SIZE] & Arf)
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if (priv->iqcfg[priv->cfg_cur++%IRQ_RING_SIZE] & cpu_to_le32(Arf))
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printk(KERN_ERR "%s: %s failed\n", dev->name, "CFG");
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if (!(state &= ~Cfg))
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goto out;
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@ -1541,7 +1544,7 @@ static void dscc4_tx_irq(struct dscc4_pci_priv *ppriv,
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try:
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cur = dpriv->iqtx_current%IRQ_RING_SIZE;
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state = dpriv->iqtx[cur];
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state = le32_to_cpu(dpriv->iqtx[cur]);
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if (!state) {
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if (debug > 4)
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printk(KERN_DEBUG "%s: Tx ISR = 0x%08x\n", dev->name,
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@ -1580,7 +1583,7 @@ try:
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tx_fd = dpriv->tx_fd + cur;
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skb = dpriv->tx_skbuff[cur];
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if (skb) {
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pci_unmap_single(ppriv->pdev, tx_fd->data,
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pci_unmap_single(ppriv->pdev, le32_to_cpu(tx_fd->data),
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skb->len, PCI_DMA_TODEVICE);
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if (tx_fd->state & FrameEnd) {
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stats->tx_packets++;
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@ -1711,7 +1714,7 @@ static void dscc4_rx_irq(struct dscc4_pci_priv *priv,
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try:
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cur = dpriv->iqrx_current%IRQ_RING_SIZE;
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state = dpriv->iqrx[cur];
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state = le32_to_cpu(dpriv->iqrx[cur]);
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if (!state)
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return;
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dpriv->iqrx[cur] = 0;
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@ -1755,7 +1758,7 @@ try:
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goto try;
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rx_fd->state1 &= ~Hold;
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rx_fd->state2 = 0x00000000;
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rx_fd->end = 0xbabeface;
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rx_fd->end = cpu_to_le32(0xbabeface);
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//}
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goto try;
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}
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@ -1834,7 +1837,7 @@ try:
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hdlc_stats(dev)->rx_over_errors++;
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rx_fd->state1 |= Hold;
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rx_fd->state2 = 0x00000000;
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rx_fd->end = 0xbabeface;
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rx_fd->end = cpu_to_le32(0xbabeface);
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} else
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dscc4_rx_skb(dpriv, dev);
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} while (1);
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@ -1904,8 +1907,9 @@ static struct sk_buff *dscc4_init_dummy_skb(struct dscc4_dev_priv *dpriv)
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skb_copy_to_linear_data(skb, version,
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strlen(version) % DUMMY_SKB_SIZE);
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tx_fd->state = FrameEnd | TO_STATE_TX(DUMMY_SKB_SIZE);
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tx_fd->data = pci_map_single(dpriv->pci_priv->pdev, skb->data,
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DUMMY_SKB_SIZE, PCI_DMA_TODEVICE);
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tx_fd->data = cpu_to_le32(pci_map_single(dpriv->pci_priv->pdev,
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skb->data, DUMMY_SKB_SIZE,
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PCI_DMA_TODEVICE));
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dpriv->tx_skbuff[last] = skb;
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}
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return skb;
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@ -1937,8 +1941,8 @@ static int dscc4_init_ring(struct net_device *dev)
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tx_fd->state = FrameEnd | TO_STATE_TX(2*DUMMY_SKB_SIZE);
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tx_fd->complete = 0x00000000;
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/* FIXME: NULL should be ok - to be tried */
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tx_fd->data = dpriv->tx_fd_dma;
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(tx_fd++)->next = (u32)(dpriv->tx_fd_dma +
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tx_fd->data = cpu_to_le32(dpriv->tx_fd_dma);
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(tx_fd++)->next = cpu_to_le32(dpriv->tx_fd_dma +
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(++i%TX_RING_SIZE)*sizeof(*tx_fd));
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} while (i < TX_RING_SIZE);
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@ -1951,12 +1955,12 @@ static int dscc4_init_ring(struct net_device *dev)
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/* size set by the host. Multiple of 4 bytes please */
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rx_fd->state1 = HiDesc;
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rx_fd->state2 = 0x00000000;
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rx_fd->end = 0xbabeface;
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rx_fd->end = cpu_to_le32(0xbabeface);
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rx_fd->state1 |= TO_STATE_RX(HDLC_MAX_MRU);
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// FIXME: return value verifiee mais traitement suspect
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if (try_get_rx_skb(dpriv, dev) >= 0)
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dpriv->rx_dirty++;
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(rx_fd++)->next = (u32)(dpriv->rx_fd_dma +
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(rx_fd++)->next = cpu_to_le32(dpriv->rx_fd_dma +
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(++i%RX_RING_SIZE)*sizeof(*rx_fd));
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} while (i < RX_RING_SIZE);
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