gma500: mid-bios: rewrite VBT/GCT handling in a cleaner way
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Kirill A. Shutemov
Dave Airlie
parent
4ad35b2e32
commit
4086b1e2b1
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@ -118,139 +118,214 @@ static void mid_get_pci_revID(struct drm_psb_private *dev_priv)
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dev_priv->platform_rev_id);
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}
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struct vbt_header {
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u32 signature;
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u8 revision;
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} __packed;
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/* The same for r0 and r1 */
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struct vbt_r0 {
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struct vbt_header vbt_header;
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u8 size;
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u8 checksum;
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} __packed;
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struct vbt_r10 {
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struct vbt_header vbt_header;
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u8 checksum;
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u16 size;
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u8 panel_count;
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u8 primary_panel_idx;
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u8 secondary_panel_idx;
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u8 __reserved[5];
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} __packed;
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static int read_vbt_r0(u32 addr, struct vbt_r0 *vbt)
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{
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void __iomem *vbt_virtual;
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vbt_virtual = ioremap(addr, sizeof(*vbt));
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if (vbt_virtual == NULL)
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return -1;
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memcpy_fromio(vbt, vbt_virtual, sizeof(*vbt));
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iounmap(vbt_virtual);
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return 0;
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}
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static int read_vbt_r10(u32 addr, struct vbt_r10 *vbt)
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{
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void __iomem *vbt_virtual;
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vbt_virtual = ioremap(addr, sizeof(*vbt));
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if (!vbt_virtual)
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return -1;
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memcpy_fromio(vbt, vbt_virtual, sizeof(*vbt));
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iounmap(vbt_virtual);
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return 0;
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}
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static int mid_get_vbt_data_r0(struct drm_psb_private *dev_priv, u32 addr)
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{
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struct vbt_r0 vbt;
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void __iomem *gct_virtual;
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struct gct_r0 gct;
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u8 bpi;
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if (read_vbt_r0(addr, &vbt))
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return -1;
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gct_virtual = ioremap(addr + sizeof(vbt), vbt.size - sizeof(vbt));
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if (!gct_virtual)
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return -1;
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memcpy_fromio(&gct, gct_virtual, sizeof(gct));
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iounmap(gct_virtual);
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bpi = gct.PD.BootPanelIndex;
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dev_priv->gct_data.bpi = bpi;
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dev_priv->gct_data.pt = gct.PD.PanelType;
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dev_priv->gct_data.DTD = gct.panel[bpi].DTD;
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dev_priv->gct_data.Panel_Port_Control =
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gct.panel[bpi].Panel_Port_Control;
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dev_priv->gct_data.Panel_MIPI_Display_Descriptor =
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gct.panel[bpi].Panel_MIPI_Display_Descriptor;
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return 0;
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}
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static int mid_get_vbt_data_r1(struct drm_psb_private *dev_priv, u32 addr)
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{
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struct vbt_r0 vbt;
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void __iomem *gct_virtual;
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struct gct_r1 gct;
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u8 bpi;
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if (read_vbt_r0(addr, &vbt))
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return -1;
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gct_virtual = ioremap(addr + sizeof(vbt), vbt.size - sizeof(vbt));
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if (!gct_virtual)
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return -1;
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memcpy_fromio(&gct, gct_virtual, sizeof(gct));
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iounmap(gct_virtual);
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bpi = gct.PD.BootPanelIndex;
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dev_priv->gct_data.bpi = bpi;
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dev_priv->gct_data.pt = gct.PD.PanelType;
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dev_priv->gct_data.DTD = gct.panel[bpi].DTD;
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dev_priv->gct_data.Panel_Port_Control =
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gct.panel[bpi].Panel_Port_Control;
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dev_priv->gct_data.Panel_MIPI_Display_Descriptor =
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gct.panel[bpi].Panel_MIPI_Display_Descriptor;
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return 0;
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}
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static int mid_get_vbt_data_r10(struct drm_psb_private *dev_priv, u32 addr)
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{
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struct vbt_r10 vbt;
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void __iomem *gct_virtual;
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struct gct_r10 *gct;
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struct oaktrail_timing_info *dp_ti = &dev_priv->gct_data.DTD;
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struct gct_r10_timing_info *ti;
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int ret = -1;
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if (read_vbt_r10(addr, &vbt))
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return -1;
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gct = kmalloc(sizeof(*gct) * vbt.panel_count, GFP_KERNEL);
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if (!gct)
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return -1;
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gct_virtual = ioremap(addr + sizeof(vbt),
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sizeof(*gct) * vbt.panel_count);
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if (!gct_virtual)
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goto out;
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memcpy_fromio(gct, gct_virtual, sizeof(*gct));
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iounmap(gct_virtual);
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dev_priv->gct_data.bpi = vbt.primary_panel_idx;
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dev_priv->gct_data.Panel_MIPI_Display_Descriptor =
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gct[vbt.primary_panel_idx].Panel_MIPI_Display_Descriptor;
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ti = &gct[vbt.primary_panel_idx].DTD;
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dp_ti->pixel_clock = ti->pixel_clock;
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dp_ti->hactive_hi = ti->hactive_hi;
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dp_ti->hactive_lo = ti->hactive_lo;
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dp_ti->hblank_hi = ti->hblank_hi;
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dp_ti->hblank_lo = ti->hblank_lo;
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dp_ti->hsync_offset_hi = ti->hsync_offset_hi;
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dp_ti->hsync_offset_lo = ti->hsync_offset_lo;
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dp_ti->hsync_pulse_width_hi = ti->hsync_pulse_width_hi;
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dp_ti->hsync_pulse_width_lo = ti->hsync_pulse_width_lo;
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dp_ti->vactive_hi = ti->vactive_hi;
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dp_ti->vactive_lo = ti->vactive_lo;
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dp_ti->vblank_hi = ti->vblank_hi;
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dp_ti->vblank_lo = ti->vblank_lo;
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dp_ti->vsync_offset_hi = ti->vsync_offset_hi;
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dp_ti->vsync_offset_lo = ti->vsync_offset_lo;
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dp_ti->vsync_pulse_width_hi = ti->vsync_pulse_width_hi;
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dp_ti->vsync_pulse_width_lo = ti->vsync_pulse_width_lo;
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ret = 0;
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out:
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kfree(gct);
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return ret;
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}
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static void mid_get_vbt_data(struct drm_psb_private *dev_priv)
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{
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struct drm_device *dev = dev_priv->dev;
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struct oaktrail_vbt *vbt = &dev_priv->vbt_data;
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u32 addr;
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u16 new_size;
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u8 *vbt_virtual;
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u8 bpi;
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u8 number_desc = 0;
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struct oaktrail_timing_info *dp_ti = &dev_priv->gct_data.DTD;
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struct gct_r10_timing_info ti;
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void *pGCT;
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u8 __iomem *vbt_virtual;
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struct vbt_header vbt_header;
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struct pci_dev *pci_gfx_root = pci_get_bus_and_slot(0, PCI_DEVFN(2, 0));
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int ret = -1;
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/* Get the address of the platform config vbt, B0:D2:F0;0xFC */
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/* Get the address of the platform config vbt */
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pci_read_config_dword(pci_gfx_root, 0xFC, &addr);
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pci_dev_put(pci_gfx_root);
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dev_dbg(dev->dev, "drm platform config address is %x\n", addr);
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/* check for platform config address == 0. */
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/* this means fw doesn't support vbt */
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if (addr == 0) {
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vbt->size = 0;
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return;
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}
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if (!addr)
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goto out;
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/* get the virtual address of the vbt */
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vbt_virtual = ioremap(addr, sizeof(*vbt));
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if (vbt_virtual == NULL) {
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vbt->size = 0;
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return;
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}
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vbt_virtual = ioremap(addr, sizeof(vbt_header));
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if (!vbt_virtual)
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goto out;
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memcpy(vbt, vbt_virtual, sizeof(*vbt));
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iounmap(vbt_virtual); /* Free virtual address space */
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memcpy_fromio(&vbt_header, vbt_virtual, sizeof(vbt_header));
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iounmap(vbt_virtual);
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/* No matching signature don't process the data */
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if (memcmp(vbt->signature, "$GCT", 4)) {
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vbt->size = 0;
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return;
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}
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if (memcmp(&vbt_header.signature, "$GCT", 4))
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goto out;
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dev_dbg(dev->dev, "GCT revision is %x\n", vbt->revision);
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dev_dbg(dev->dev, "GCT revision is %02x\n", vbt_header.revision);
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switch (vbt->revision) {
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case 0:
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vbt->oaktrail_gct = ioremap(addr + sizeof(*vbt) - 4,
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vbt->size - sizeof(*vbt) + 4);
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pGCT = vbt->oaktrail_gct;
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bpi = ((struct oaktrail_gct_v1 *)pGCT)->PD.BootPanelIndex;
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dev_priv->gct_data.bpi = bpi;
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dev_priv->gct_data.pt =
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((struct oaktrail_gct_v1 *)pGCT)->PD.PanelType;
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memcpy(&dev_priv->gct_data.DTD,
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&((struct oaktrail_gct_v1 *)pGCT)->panel[bpi].DTD,
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sizeof(struct oaktrail_timing_info));
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dev_priv->gct_data.Panel_Port_Control =
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((struct oaktrail_gct_v1 *)pGCT)->panel[bpi].Panel_Port_Control;
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dev_priv->gct_data.Panel_MIPI_Display_Descriptor =
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((struct oaktrail_gct_v1 *)pGCT)->panel[bpi].Panel_MIPI_Display_Descriptor;
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switch (vbt_header.revision) {
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case 0x00:
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ret = mid_get_vbt_data_r0(dev_priv, addr);
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break;
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case 1:
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vbt->oaktrail_gct = ioremap(addr + sizeof(*vbt) - 4,
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vbt->size - sizeof(*vbt) + 4);
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pGCT = vbt->oaktrail_gct;
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bpi = ((struct oaktrail_gct_v2 *)pGCT)->PD.BootPanelIndex;
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dev_priv->gct_data.bpi = bpi;
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dev_priv->gct_data.pt =
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((struct oaktrail_gct_v2 *)pGCT)->PD.PanelType;
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memcpy(&dev_priv->gct_data.DTD,
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&((struct oaktrail_gct_v2 *)pGCT)->panel[bpi].DTD,
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sizeof(struct oaktrail_timing_info));
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dev_priv->gct_data.Panel_Port_Control =
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((struct oaktrail_gct_v2 *)pGCT)->panel[bpi].Panel_Port_Control;
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dev_priv->gct_data.Panel_MIPI_Display_Descriptor =
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((struct oaktrail_gct_v2 *)pGCT)->panel[bpi].Panel_MIPI_Display_Descriptor;
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case 0x01:
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ret = mid_get_vbt_data_r1(dev_priv, addr);
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break;
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case 0x10:
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/*header definition changed from rev 01 (v2) to rev 10h. */
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/*so, some values have changed location*/
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new_size = vbt->checksum; /*checksum contains lo size byte*/
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/*LSB of oaktrail_gct contains hi size byte*/
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new_size |= ((0xff & (unsigned int)(long)vbt->oaktrail_gct)) << 8;
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vbt->checksum = vbt->size; /*size contains the checksum*/
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if (new_size > 0xff)
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vbt->size = 0xff; /*restrict size to 255*/
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else
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vbt->size = new_size;
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/* number of descriptors defined in the GCT */
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number_desc = ((0xff00 & (unsigned int)(long)vbt->oaktrail_gct)) >> 8;
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bpi = ((0xff0000 & (unsigned int)(long)vbt->oaktrail_gct)) >> 16;
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vbt->oaktrail_gct = ioremap(addr + GCT_R10_HEADER_SIZE,
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GCT_R10_DISPLAY_DESC_SIZE * number_desc);
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pGCT = vbt->oaktrail_gct;
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pGCT = (u8 *)pGCT + (bpi*GCT_R10_DISPLAY_DESC_SIZE);
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dev_priv->gct_data.bpi = bpi; /*save boot panel id*/
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/*copy the GCT display timings into a temp structure*/
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memcpy(&ti, pGCT, sizeof(struct gct_r10_timing_info));
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/*now copy the temp struct into the dev_priv->gct_data*/
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dp_ti->pixel_clock = ti.pixel_clock;
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dp_ti->hactive_hi = ti.hactive_hi;
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dp_ti->hactive_lo = ti.hactive_lo;
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dp_ti->hblank_hi = ti.hblank_hi;
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dp_ti->hblank_lo = ti.hblank_lo;
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dp_ti->hsync_offset_hi = ti.hsync_offset_hi;
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dp_ti->hsync_offset_lo = ti.hsync_offset_lo;
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dp_ti->hsync_pulse_width_hi = ti.hsync_pulse_width_hi;
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dp_ti->hsync_pulse_width_lo = ti.hsync_pulse_width_lo;
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dp_ti->vactive_hi = ti.vactive_hi;
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dp_ti->vactive_lo = ti.vactive_lo;
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dp_ti->vblank_hi = ti.vblank_hi;
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dp_ti->vblank_lo = ti.vblank_lo;
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dp_ti->vsync_offset_hi = ti.vsync_offset_hi;
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dp_ti->vsync_offset_lo = ti.vsync_offset_lo;
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dp_ti->vsync_pulse_width_hi = ti.vsync_pulse_width_hi;
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dp_ti->vsync_pulse_width_lo = ti.vsync_pulse_width_lo;
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/* Move the MIPI_Display_Descriptor data from GCT to dev priv */
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dev_priv->gct_data.Panel_MIPI_Display_Descriptor =
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*((u8 *)pGCT + 0x0d);
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dev_priv->gct_data.Panel_MIPI_Display_Descriptor |=
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(*((u8 *)pGCT + 0x0e)) << 8;
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ret = mid_get_vbt_data_r10(dev_priv, addr);
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break;
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default:
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dev_err(dev->dev, "Unknown revision of GCT!\n");
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vbt->size = 0;
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}
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out:
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if (ret)
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dev_err(dev->dev, "Unable to read GCT!");
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else
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dev_priv->has_gct = true;
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}
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int mid_chip_setup(struct drm_device *dev)
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@ -19,14 +19,6 @@
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/* MID device specific descriptors */
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struct oaktrail_vbt {
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s8 signature[4]; /*4 bytes,"$GCT" */
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u8 revision;
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u8 size;
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u8 checksum;
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void *oaktrail_gct;
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} __packed;
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struct oaktrail_timing_info {
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u16 pixel_clock;
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u8 hactive_lo;
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@ -161,7 +153,7 @@ union oaktrail_panel_rx {
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u16 panel_receiver;
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} __packed;
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struct oaktrail_gct_v1 {
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struct gct_r0 {
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union { /*8 bits,Defined as follows: */
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struct {
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u8 PanelType:4; /*4 bits, Bit field for panels*/
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@ -178,7 +170,7 @@ struct oaktrail_gct_v1 {
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union oaktrail_panel_rx panelrx[4]; /* panel receivers*/
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} __packed;
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struct oaktrail_gct_v2 {
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struct gct_r1 {
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union { /*8 bits,Defined as follows: */
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struct {
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u8 PanelType:4; /*4 bits, Bit field for panels*/
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@ -195,6 +187,16 @@ struct oaktrail_gct_v2 {
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union oaktrail_panel_rx panelrx[4]; /* panel receivers*/
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} __packed;
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struct gct_r10 {
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struct gct_r10_timing_info DTD;
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u16 Panel_MIPI_Display_Descriptor;
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u16 Panel_MIPI_Receiver_Descriptor;
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u16 Panel_Backlight_Inverter_Descriptor;
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u8 Panel_Initial_Brightness;
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u32 MIPI_Ctlr_Init_ptr;
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u32 MIPI_Panel_Init_ptr;
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} __packed;
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struct oaktrail_gct_data {
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u8 bpi; /* boot panel index, number of panel used during boot */
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u8 pt; /* panel type, 4 bit field, 0=lvds, 1=mipi */
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@ -213,9 +215,6 @@ struct oaktrail_gct_data {
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#define MODE_SETTING_IN_DSR 0x4
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#define MODE_SETTING_ENCODER_DONE 0x8
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#define GCT_R10_HEADER_SIZE 16
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#define GCT_R10_DISPLAY_DESC_SIZE 28
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/*
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* Moorestown HDMI interfaces
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*/
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@ -458,13 +458,12 @@ static int oaktrail_power_up(struct drm_device *dev)
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static int oaktrail_chip_setup(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct oaktrail_vbt *vbt = &dev_priv->vbt_data;
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int ret;
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ret = mid_chip_setup(dev);
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if (ret < 0)
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return ret;
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if (vbt->size == 0) {
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if (!dev_priv->has_gct) {
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/* Now pull the BIOS data */
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psb_intel_opregion_init(dev);
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psb_intel_init_bios(dev);
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@ -476,10 +475,9 @@ static int oaktrail_chip_setup(struct drm_device *dev)
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static void oaktrail_teardown(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct oaktrail_vbt *vbt = &dev_priv->vbt_data;
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oaktrail_hdmi_teardown(dev);
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if (vbt->size == 0)
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if (!dev_priv->has_gct)
|
||||
psb_intel_destroy_bios(dev);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -257,7 +257,7 @@ static void oaktrail_lvds_get_configuration_mode(struct drm_device *dev,
|
|||
mode_dev->panel_fixed_mode = NULL;
|
||||
|
||||
/* Use the firmware provided data on Moorestown */
|
||||
if (dev_priv->vbt_data.size != 0x00) { /*if non-zero, then use vbt*/
|
||||
if (dev_priv->has_gct) {
|
||||
mode = kzalloc(sizeof(*mode), GFP_KERNEL);
|
||||
if (!mode)
|
||||
return;
|
||||
|
|
@ -371,7 +371,7 @@ void oaktrail_lvds_init(struct drm_device *dev,
|
|||
BRIGHTNESS_MAX_LEVEL);
|
||||
|
||||
mode_dev->panel_wants_dither = false;
|
||||
if (dev_priv->vbt_data.size != 0x00)
|
||||
if (dev_priv->has_gct)
|
||||
mode_dev->panel_wants_dither = (dev_priv->gct_data.
|
||||
Panel_Port_Control & MRST_PANEL_8TO6_DITHER_ENABLE);
|
||||
if (dev_priv->lvds_dither)
|
||||
|
|
|
|||
|
|
@ -612,7 +612,7 @@ struct drm_psb_private {
|
|||
int rpm_enabled;
|
||||
|
||||
/* MID specific */
|
||||
struct oaktrail_vbt vbt_data;
|
||||
bool has_gct;
|
||||
struct oaktrail_gct_data gct_data;
|
||||
|
||||
/* Oaktrail HDMI state */
|
||||
|
|
|
|||
Loading…
Reference in New Issue