iommu/amd: Remove global amd_iommu_[dev_table/alias_table/last_bdf]
Replace them with per PCI segment device table. Also remove dev_table_size, alias_table_size, amd_iommu_last_bdf variables. Co-developed-by: Vasant Hegde <vasant.hegde@amd.com> Signed-off-by: Vasant Hegde <vasant.hegde@amd.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Link: https://lore.kernel.org/r/20220706113825.25582-28-vasant.hegde@amd.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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401360ec98
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@ -834,24 +834,9 @@ struct unity_map_entry {
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* Data structures for device handling
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*/
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/*
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* Device table used by hardware. Read and write accesses by software are
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* locked with the amd_iommu_pd_table lock.
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*/
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extern struct dev_table_entry *amd_iommu_dev_table;
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/*
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* Alias table to find requestor ids to device ids. Not locked because only
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* read on runtime.
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*/
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extern u16 *amd_iommu_alias_table;
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/* size of the dma_ops aperture as power of 2 */
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extern unsigned amd_iommu_aperture_order;
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/* largest PCI device id we expect translation requests for */
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extern u16 amd_iommu_last_bdf;
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/* allocation bitmap for domain ids */
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extern unsigned long *amd_iommu_pd_alloc_bitmap;
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@ -160,9 +160,6 @@ static bool amd_iommu_disabled __initdata;
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static bool amd_iommu_force_enable __initdata;
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static int amd_iommu_target_ivhd_type;
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u16 amd_iommu_last_bdf; /* largest PCI device id we have
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to handle */
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LIST_HEAD(amd_iommu_pci_seg_list); /* list of all PCI segments */
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LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the
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system */
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@ -185,30 +182,12 @@ bool amdr_ivrs_remap_support __read_mostly;
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bool amd_iommu_force_isolation __read_mostly;
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/*
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* Pointer to the device table which is shared by all AMD IOMMUs
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* it is indexed by the PCI device id or the HT unit id and contains
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* information about the domain the device belongs to as well as the
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* page table root pointer.
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*/
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struct dev_table_entry *amd_iommu_dev_table;
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/*
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* The alias table is a driver specific data structure which contains the
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* mappings of the PCI device ids to the actual requestor ids on the IOMMU.
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* More than one device can share the same requestor id.
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*/
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u16 *amd_iommu_alias_table;
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/*
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* AMD IOMMU allows up to 2^16 different protection domains. This is a bitmap
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* to know which ones are already in use.
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*/
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unsigned long *amd_iommu_pd_alloc_bitmap;
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static u32 dev_table_size; /* size of the device table */
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static u32 alias_table_size; /* size of the alias table */
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enum iommu_init_state {
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IOMMU_START_STATE,
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IOMMU_IVRS_DETECTED,
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@ -263,16 +242,10 @@ static void init_translation_status(struct amd_iommu *iommu)
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iommu->flags |= AMD_IOMMU_FLAG_TRANS_PRE_ENABLED;
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}
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static inline void update_last_devid(u16 devid)
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{
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if (devid > amd_iommu_last_bdf)
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amd_iommu_last_bdf = devid;
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}
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static inline unsigned long tbl_size(int entry_size)
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static inline unsigned long tbl_size(int entry_size, int last_bdf)
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{
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unsigned shift = PAGE_SHIFT +
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get_order(((int)amd_iommu_last_bdf + 1) * entry_size);
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get_order((last_bdf + 1) * entry_size);
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return 1UL << shift;
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}
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@ -404,10 +377,11 @@ static void iommu_set_device_table(struct amd_iommu *iommu)
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{
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u64 entry;
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u32 dev_table_size = iommu->pci_seg->dev_table_size;
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void *dev_table = (void *)get_dev_table(iommu);
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BUG_ON(iommu->mmio_base == NULL);
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entry = iommu_virt_to_phys(amd_iommu_dev_table);
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entry = iommu_virt_to_phys(dev_table);
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entry |= (dev_table_size >> 12) - 1;
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memcpy_toio(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET,
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&entry, sizeof(entry));
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@ -557,14 +531,12 @@ static int __init find_last_devid_from_ivhd(struct ivhd_header *h)
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switch (dev->type) {
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case IVHD_DEV_ALL:
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/* Use maximum BDF value for DEV_ALL */
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update_last_devid(0xffff);
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return 0xffff;
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case IVHD_DEV_SELECT:
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case IVHD_DEV_RANGE_END:
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case IVHD_DEV_ALIAS:
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case IVHD_DEV_EXT_SELECT:
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/* all the above subfield types refer to device ids */
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update_last_devid(dev->devid);
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if (dev->devid > last_devid)
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last_devid = dev->devid;
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break;
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@ -706,7 +678,7 @@ static int __init alloc_alias_table(struct amd_iommu_pci_seg *pci_seg)
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/*
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* let all alias entries point to itself
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*/
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for (i = 0; i <= amd_iommu_last_bdf; ++i)
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for (i = 0; i <= pci_seg->last_bdf; ++i)
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pci_seg->alias_table[i] = i;
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return 0;
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@ -1072,7 +1044,7 @@ static bool __copy_device_table(struct amd_iommu *iommu)
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return false;
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}
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for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) {
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for (devid = 0; devid <= pci_seg->last_bdf; ++devid) {
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pci_seg->old_dev_tbl_cpy[devid] = old_devtb[devid];
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dom_id = old_devtb[devid].data[1] & DEV_DOMID_MASK;
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dte_v = old_devtb[devid].data[0] & DTE_FLAG_V;
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@ -1149,12 +1121,6 @@ void amd_iommu_apply_erratum_63(struct amd_iommu *iommu, u16 devid)
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set_dev_entry_bit(iommu, devid, DEV_ENTRY_IW);
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}
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/* Writes the specific IOMMU for a device into the rlookup table */
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static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid)
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{
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iommu->pci_seg->rlookup_table[devid] = iommu;
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}
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/*
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* This function takes the device specific flags read from the ACPI
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* table and sets up the device table entry with that information
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@ -1179,7 +1145,7 @@ static void __init set_dev_entry_from_acpi(struct amd_iommu *iommu,
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amd_iommu_apply_erratum_63(iommu, devid);
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set_iommu_for_device(iommu, devid);
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amd_iommu_set_rlookup_table(iommu, devid);
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}
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int __init add_special_device(u8 type, u8 id, u16 *devid, bool cmd_line)
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@ -1339,7 +1305,7 @@ static int __init init_iommu_from_acpi(struct amd_iommu *iommu,
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DUMP_printk(" DEV_ALL\t\t\tflags: %02x\n", e->flags);
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for (dev_i = 0; dev_i <= amd_iommu_last_bdf; ++dev_i)
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for (dev_i = 0; dev_i <= pci_seg->last_bdf; ++dev_i)
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set_dev_entry_from_acpi(iommu, dev_i, e->flags, 0);
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break;
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case IVHD_DEV_SELECT:
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@ -1584,9 +1550,9 @@ static struct amd_iommu_pci_seg *__init alloc_pci_segment(u16 id,
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pci_seg->last_bdf = last_bdf;
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DUMP_printk("PCI segment : 0x%0x, last bdf : 0x%04x\n", id, last_bdf);
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pci_seg->dev_table_size = tbl_size(DEV_TABLE_ENTRY_SIZE);
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pci_seg->alias_table_size = tbl_size(ALIAS_TABLE_ENTRY_SIZE);
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pci_seg->rlookup_table_size = tbl_size(RLOOKUP_TABLE_ENTRY_SIZE);
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pci_seg->dev_table_size = tbl_size(DEV_TABLE_ENTRY_SIZE, last_bdf);
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pci_seg->alias_table_size = tbl_size(ALIAS_TABLE_ENTRY_SIZE, last_bdf);
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pci_seg->rlookup_table_size = tbl_size(RLOOKUP_TABLE_ENTRY_SIZE, last_bdf);
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pci_seg->id = id;
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init_llist_head(&pci_seg->dev_data_list);
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@ -2469,7 +2435,7 @@ static int __init init_unity_map_range(struct ivmd_header *m,
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case ACPI_IVMD_TYPE_ALL:
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s = "IVMD_TYPE_ALL\t\t";
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e->devid_start = 0;
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e->devid_end = amd_iommu_last_bdf;
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e->devid_end = pci_seg->last_bdf;
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break;
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case ACPI_IVMD_TYPE_RANGE:
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s = "IVMD_TYPE_RANGE\t\t";
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@ -2536,7 +2502,7 @@ static void init_device_table_dma(struct amd_iommu_pci_seg *pci_seg)
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if (dev_table == NULL)
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return;
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for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) {
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for (devid = 0; devid <= pci_seg->last_bdf; ++devid) {
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__set_dev_entry_bit(dev_table, devid, DEV_ENTRY_VALID);
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__set_dev_entry_bit(dev_table, devid, DEV_ENTRY_TRANSLATION);
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}
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@ -2550,7 +2516,7 @@ static void __init uninit_device_table_dma(struct amd_iommu_pci_seg *pci_seg)
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if (dev_table == NULL)
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return;
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for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) {
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for (devid = 0; devid <= pci_seg->last_bdf; ++devid) {
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dev_table[devid].data[0] = 0ULL;
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dev_table[devid].data[1] = 0ULL;
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}
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@ -2565,7 +2531,7 @@ static void init_device_table(void)
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return;
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for_each_pci_segment(pci_seg) {
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for (devid = 0; devid <= amd_iommu_last_bdf; ++devid)
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for (devid = 0; devid <= pci_seg->last_bdf; ++devid)
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__set_dev_entry_bit(pci_seg->dev_table,
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devid, DEV_ENTRY_IRQ_TBL_EN);
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}
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@ -2808,14 +2774,6 @@ static void __init free_iommu_resources(void)
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kmem_cache_destroy(amd_iommu_irq_cache);
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amd_iommu_irq_cache = NULL;
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free_pages((unsigned long)amd_iommu_alias_table,
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get_order(alias_table_size));
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amd_iommu_alias_table = NULL;
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free_pages((unsigned long)amd_iommu_dev_table,
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get_order(dev_table_size));
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amd_iommu_dev_table = NULL;
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free_iommu_all();
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free_pci_segments();
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}
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@ -2944,25 +2902,8 @@ static int __init early_amd_iommu_init(void)
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amd_iommu_target_ivhd_type = get_highest_supported_ivhd_type(ivrs_base);
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DUMP_printk("Using IVHD type %#x\n", amd_iommu_target_ivhd_type);
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dev_table_size = tbl_size(DEV_TABLE_ENTRY_SIZE);
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alias_table_size = tbl_size(ALIAS_TABLE_ENTRY_SIZE);
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/* Device table - directly used by all IOMMUs */
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ret = -ENOMEM;
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amd_iommu_dev_table = (void *)__get_free_pages(
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GFP_KERNEL | __GFP_ZERO | GFP_DMA32,
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get_order(dev_table_size));
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if (amd_iommu_dev_table == NULL)
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goto out;
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/*
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* Alias table - map PCI Bus/Dev/Func to Bus/Dev/Func the
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* IOMMU see for that device
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*/
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amd_iommu_alias_table = (void *)__get_free_pages(GFP_KERNEL,
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get_order(alias_table_size));
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if (amd_iommu_alias_table == NULL)
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goto out;
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amd_iommu_pd_alloc_bitmap = (void *)__get_free_pages(
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GFP_KERNEL | __GFP_ZERO,
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@ -230,6 +230,7 @@ static struct iommu_dev_data *search_dev_data(struct amd_iommu *iommu, u16 devid
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static int clone_alias(struct pci_dev *pdev, u16 alias, void *data)
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{
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struct amd_iommu *iommu;
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struct dev_table_entry *dev_table;
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u16 devid = pci_dev_id(pdev);
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if (devid == alias)
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@ -240,9 +241,10 @@ static int clone_alias(struct pci_dev *pdev, u16 alias, void *data)
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return 0;
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amd_iommu_set_rlookup_table(iommu, alias);
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memcpy(amd_iommu_dev_table[alias].data,
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amd_iommu_dev_table[devid].data,
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sizeof(amd_iommu_dev_table[alias].data));
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dev_table = get_dev_table(iommu);
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memcpy(dev_table[alias].data,
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dev_table[devid].data,
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sizeof(dev_table[alias].data));
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return 0;
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}
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@ -356,6 +358,8 @@ static bool pci_iommuv2_capable(struct pci_dev *pdev)
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*/
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static bool check_device(struct device *dev)
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{
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struct amd_iommu_pci_seg *pci_seg;
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struct amd_iommu *iommu;
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int devid;
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if (!dev)
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@ -365,11 +369,13 @@ static bool check_device(struct device *dev)
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if (devid < 0)
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return false;
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/* Out of our scope? */
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if (devid > amd_iommu_last_bdf)
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iommu = rlookup_amd_iommu(dev);
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if (!iommu)
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return false;
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if (rlookup_amd_iommu(dev) == NULL)
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/* Out of our scope? */
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pci_seg = iommu->pci_seg;
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if ((devid & 0xffff) > pci_seg->last_bdf)
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return false;
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return true;
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