Documentation: KVM: Update documentation to indicate KVM is arm64-only
KVM support for 32-bit ARM hosts (KVM/arm) has been removed from the
kernel since commit 541ad0150c
("arm: Remove 32bit KVM host
support"). There still exists some remnants of the old architecture in
the KVM documentation.
Remove all traces of 32-bit host support from the documentation. Note
that AArch32 guests are still supported.
Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Oliver Upton <oupton@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220308172856.2997250-1-oupton@google.com
This commit is contained in:
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@ -417,7 +417,7 @@ kvm_run' (see below).
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-----------------
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:Capability: basic
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:Architectures: all except ARM, arm64
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:Architectures: all except arm64
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:Type: vcpu ioctl
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:Parameters: struct kvm_regs (out)
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:Returns: 0 on success, -1 on error
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@ -450,7 +450,7 @@ Reads the general purpose registers from the vcpu.
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-----------------
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:Capability: basic
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:Architectures: all except ARM, arm64
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:Architectures: all except arm64
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:Type: vcpu ioctl
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:Parameters: struct kvm_regs (in)
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:Returns: 0 on success, -1 on error
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@ -824,7 +824,7 @@ Writes the floating point state to the vcpu.
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-----------------------
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:Capability: KVM_CAP_IRQCHIP, KVM_CAP_S390_IRQCHIP (s390)
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:Architectures: x86, ARM, arm64, s390
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:Architectures: x86, arm64, s390
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:Type: vm ioctl
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:Parameters: none
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:Returns: 0 on success, -1 on error
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@ -833,7 +833,7 @@ Creates an interrupt controller model in the kernel.
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On x86, creates a virtual ioapic, a virtual PIC (two PICs, nested), and sets up
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future vcpus to have a local APIC. IRQ routing for GSIs 0-15 is set to both
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PIC and IOAPIC; GSI 16-23 only go to the IOAPIC.
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On ARM/arm64, a GICv2 is created. Any other GIC versions require the usage of
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On arm64, a GICv2 is created. Any other GIC versions require the usage of
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KVM_CREATE_DEVICE, which also supports creating a GICv2. Using
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KVM_CREATE_DEVICE is preferred over KVM_CREATE_IRQCHIP for GICv2.
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On s390, a dummy irq routing table is created.
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@ -846,7 +846,7 @@ before KVM_CREATE_IRQCHIP can be used.
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-----------------
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:Capability: KVM_CAP_IRQCHIP
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:Architectures: x86, arm, arm64
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:Architectures: x86, arm64
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:Type: vm ioctl
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:Parameters: struct kvm_irq_level
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:Returns: 0 on success, -1 on error
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@ -870,7 +870,7 @@ capability is present (or unless it is not using the in-kernel irqchip,
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of course).
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ARM/arm64 can signal an interrupt either at the CPU level, or at the
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arm64 can signal an interrupt either at the CPU level, or at the
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in-kernel irqchip (GIC), and for in-kernel irqchip can tell the GIC to
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use PPIs designated for specific cpus. The irq field is interpreted
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like this::
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@ -896,7 +896,7 @@ When KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 is supported, the target vcpu is
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identified as (256 * vcpu2_index + vcpu_index). Otherwise, vcpu2_index
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must be zero.
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Note that on arm/arm64, the KVM_CAP_IRQCHIP capability only conditions
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Note that on arm64, the KVM_CAP_IRQCHIP capability only conditions
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injection of interrupts for the in-kernel irqchip. KVM_IRQ_LINE can always
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be used for a userspace interrupt controller.
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@ -1087,7 +1087,7 @@ Other flags returned by ``KVM_GET_CLOCK`` are accepted but ignored.
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:Capability: KVM_CAP_VCPU_EVENTS
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:Extended by: KVM_CAP_INTR_SHADOW
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:Architectures: x86, arm, arm64
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:Architectures: x86, arm64
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:Type: vcpu ioctl
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:Parameters: struct kvm_vcpu_event (out)
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:Returns: 0 on success, -1 on error
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@ -1146,8 +1146,8 @@ The following bits are defined in the flags field:
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fields contain a valid state. This bit will be set whenever
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KVM_CAP_EXCEPTION_PAYLOAD is enabled.
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ARM/ARM64:
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^^^^^^^^^^
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ARM64:
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^^^^^^
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If the guest accesses a device that is being emulated by the host kernel in
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such a way that a real device would generate a physical SError, KVM may make
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@ -1206,7 +1206,7 @@ directly to the virtual CPU).
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:Capability: KVM_CAP_VCPU_EVENTS
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:Extended by: KVM_CAP_INTR_SHADOW
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:Architectures: x86, arm, arm64
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:Architectures: x86, arm64
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:Type: vcpu ioctl
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:Parameters: struct kvm_vcpu_event (in)
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:Returns: 0 on success, -1 on error
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@ -1241,8 +1241,8 @@ can be set in the flags field to signal that the
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exception_has_payload, exception_payload, and exception.pending fields
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contain a valid state and shall be written into the VCPU.
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ARM/ARM64:
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^^^^^^^^^^
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ARM64:
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^^^^^^
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User space may need to inject several types of events to the guest.
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@ -1449,7 +1449,7 @@ for vm-wide capabilities.
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---------------------
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:Capability: KVM_CAP_MP_STATE
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:Architectures: x86, s390, arm, arm64, riscv
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:Architectures: x86, s390, arm64, riscv
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:Type: vcpu ioctl
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:Parameters: struct kvm_mp_state (out)
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:Returns: 0 on success; -1 on error
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@ -1467,7 +1467,7 @@ Possible values are:
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========================== ===============================================
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KVM_MP_STATE_RUNNABLE the vcpu is currently running
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[x86,arm/arm64,riscv]
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[x86,arm64,riscv]
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KVM_MP_STATE_UNINITIALIZED the vcpu is an application processor (AP)
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which has not yet received an INIT signal [x86]
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KVM_MP_STATE_INIT_RECEIVED the vcpu has received an INIT signal, and is
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@ -1476,7 +1476,7 @@ Possible values are:
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is waiting for an interrupt [x86]
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KVM_MP_STATE_SIPI_RECEIVED the vcpu has just received a SIPI (vector
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accessible via KVM_GET_VCPU_EVENTS) [x86]
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KVM_MP_STATE_STOPPED the vcpu is stopped [s390,arm/arm64,riscv]
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KVM_MP_STATE_STOPPED the vcpu is stopped [s390,arm64,riscv]
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KVM_MP_STATE_CHECK_STOP the vcpu is in a special error state [s390]
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KVM_MP_STATE_OPERATING the vcpu is operating (running or halted)
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[s390]
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@ -1488,8 +1488,8 @@ On x86, this ioctl is only useful after KVM_CREATE_IRQCHIP. Without an
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in-kernel irqchip, the multiprocessing state must be maintained by userspace on
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these architectures.
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For arm/arm64/riscv:
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^^^^^^^^^^^^^^^^^^^^
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For arm64/riscv:
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^^^^^^^^^^^^^^^^
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The only states that are valid are KVM_MP_STATE_STOPPED and
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KVM_MP_STATE_RUNNABLE which reflect if the vcpu is paused or not.
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@ -1498,7 +1498,7 @@ KVM_MP_STATE_RUNNABLE which reflect if the vcpu is paused or not.
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---------------------
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:Capability: KVM_CAP_MP_STATE
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:Architectures: x86, s390, arm, arm64, riscv
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:Architectures: x86, s390, arm64, riscv
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:Type: vcpu ioctl
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:Parameters: struct kvm_mp_state (in)
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:Returns: 0 on success; -1 on error
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in-kernel irqchip, the multiprocessing state must be maintained by userspace on
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these architectures.
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For arm/arm64/riscv:
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^^^^^^^^^^^^^^^^^^^^
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For arm64/riscv:
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^^^^^^^^^^^^^^^^
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The only states that are valid are KVM_MP_STATE_STOPPED and
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KVM_MP_STATE_RUNNABLE which reflect if the vcpu should be paused or not.
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------------------------
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:Capability: KVM_CAP_IRQ_ROUTING
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:Architectures: x86 s390 arm arm64
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:Architectures: x86 s390 arm64
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:Type: vm ioctl
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:Parameters: struct kvm_irq_routing (in)
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:Returns: 0 on success, -1 on error
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Sets the GSI routing table entries, overwriting any previously set entries.
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On arm/arm64, GSI routing has the following limitation:
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On arm64, GSI routing has the following limitation:
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- GSI routing does not apply to KVM_IRQ_LINE but only to KVM_IRQFD.
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-------------------
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:Capability: KVM_CAP_SIGNAL_MSI
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:Architectures: x86 arm arm64
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:Architectures: x86 arm64
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:Type: vm ioctl
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:Parameters: struct kvm_msi (in)
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:Returns: >0 on delivery, 0 if guest blocked the MSI, and -1 on error
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@ -3043,7 +3043,7 @@ into the hash PTE second double word).
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--------------
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:Capability: KVM_CAP_IRQFD
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:Architectures: x86 s390 arm arm64
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:Architectures: x86 s390 arm64
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:Type: vm ioctl
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:Parameters: struct kvm_irqfd (in)
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:Returns: 0 on success, -1 on error
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@ -3069,7 +3069,7 @@ Note that closing the resamplefd is not sufficient to disable the
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irqfd. The KVM_IRQFD_FLAG_RESAMPLE is only necessary on assignment
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and need not be specified with KVM_IRQFD_FLAG_DEASSIGN.
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On arm/arm64, gsi routing being supported, the following can happen:
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On arm64, gsi routing being supported, the following can happen:
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- in case no routing entry is associated to this gsi, injection fails
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- in case the gsi is associated to an irqchip routing entry,
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----------------------
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:Capability: basic
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:Architectures: arm, arm64
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:Architectures: arm64
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:Type: vcpu ioctl
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:Parameters: struct kvm_vcpu_init (in)
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:Returns: 0 on success; -1 on error
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-----------------------------
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:Capability: basic
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:Architectures: arm, arm64
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:Architectures: arm64
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:Type: vm ioctl
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:Parameters: struct kvm_vcpu_init (out)
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:Returns: 0 on success; -1 on error
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---------------------
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:Capability: basic
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:Architectures: arm, arm64, mips
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:Architectures: arm64, mips
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:Type: vcpu ioctl
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:Parameters: struct kvm_reg_list (in/out)
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:Returns: 0 on success; -1 on error
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-----------------------------------------
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:Capability: KVM_CAP_ARM_SET_DEVICE_ADDR
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:Architectures: arm, arm64
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:Architectures: arm64
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:Type: vm ioctl
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:Parameters: struct kvm_arm_device_address (in)
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:Returns: 0 on success, -1 on error
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to know about. The id field is an architecture specific identifier for a
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specific device.
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ARM/arm64 divides the id field into two parts, a device id and an
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arm64 divides the id field into two parts, a device id and an
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address type id specific to the individual device::
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bits: | 63 ... 32 | 31 ... 16 | 15 ... 0 |
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field: | 0x00000000 | device id | addr type id |
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ARM/arm64 currently only require this when using the in-kernel GIC
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arm64 currently only require this when using the in-kernel GIC
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support for the hardware VGIC features, using KVM_ARM_DEVICE_VGIC_V2
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as the device id. When setting the base address for the guest's
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mapping of the VGIC virtual CPU and distributor interface, the ioctl
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@ -4726,7 +4726,7 @@ to I/O ports.
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------------------------------------
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:Capability: KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2
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:Architectures: x86, arm, arm64, mips
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:Architectures: x86, arm64, mips
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:Type: vm ioctl
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:Parameters: struct kvm_clear_dirty_log (in)
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:Returns: 0 on success, -1 on error
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4.119 KVM_ARM_VCPU_FINALIZE
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---------------------------
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:Architectures: arm, arm64
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:Architectures: arm64
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:Type: vcpu ioctl
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:Parameters: int feature (in)
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:Returns: 0 on success, -1 on error
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If exit_reason is KVM_EXIT_SYSTEM_EVENT then the vcpu has triggered
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a system-level event using some architecture specific mechanism (hypercall
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or some special instruction). In case of ARM/ARM64, this is triggered using
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or some special instruction). In case of ARM64, this is triggered using
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HVC instruction based PSCI call from the vcpu. The 'type' field describes
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the system-level event type. The 'flags' field describes architecture
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specific flags for the system-level event.
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@ -6013,7 +6013,7 @@ in send_page or recv a buffer to recv_page).
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__u64 fault_ipa;
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} arm_nisv;
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Used on arm and arm64 systems. If a guest accesses memory not in a memslot,
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Used on arm64 systems. If a guest accesses memory not in a memslot,
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KVM will typically return to userspace and ask it to do MMIO emulation on its
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behalf. However, for certain classes of instructions, no instruction decode
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(direction, length of memory access) is provided, and fetching and decoding
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Userspace implementations can query for KVM_CAP_ARM_NISV_TO_USER, and enable
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this capability at VM creation. Once this is done, these types of errors will
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instead return to userspace with KVM_EXIT_ARM_NISV, with the valid bits from
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the HSR (arm) and ESR_EL2 (arm64) in the esr_iss field, and the faulting IPA
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in the fault_ipa field. Userspace can either fix up the access if it's
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actually an I/O access by decoding the instruction from guest memory (if it's
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very brave) and continue executing the guest, or it can decide to suspend,
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dump, or restart the guest.
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the ESR_EL2 in the esr_iss field, and the faulting IPA in the fault_ipa field.
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Userspace can either fix up the access if it's actually an I/O access by
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decoding the instruction from guest memory (if it's very brave) and continue
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executing the guest, or it can decide to suspend, dump, or restart the guest.
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Note that KVM does not skip the faulting instruction as it does for
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KVM_EXIT_MMIO, but userspace has to emulate any change to the processing state
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@ -6741,7 +6740,7 @@ and injected exceptions.
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7.18 KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2
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:Architectures: x86, arm, arm64, mips
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:Architectures: x86, arm64, mips
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:Parameters: args[0] whether feature should be enabled or not
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Valid flags are::
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@ -7124,7 +7123,7 @@ reserved.
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8.9 KVM_CAP_ARM_USER_IRQ
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------------------------
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:Architectures: arm, arm64
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:Architectures: arm64
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This capability, if KVM_CHECK_EXTENSION indicates that it is available, means
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that if userspace creates a VM without an in-kernel interrupt controller, it
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8.19 KVM_CAP_ARM_INJECT_SERROR_ESR
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----------------------------------
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:Architectures: arm, arm64
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:Architectures: arm64
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This capability indicates that userspace can specify (via the
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KVM_SET_VCPU_EVENTS ioctl) the syndrome value reported to the guest when it
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@ -108,7 +108,7 @@ using event 0x11 (CPU_CYCLES).
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2. GROUP: KVM_ARM_VCPU_TIMER_CTRL
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=================================
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:Architectures: ARM, ARM64
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:Architectures: ARM64
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2.1. ATTRIBUTES: KVM_ARM_VCPU_TIMER_IRQ_VTIMER, KVM_ARM_VCPU_TIMER_IRQ_PTIMER
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-----------------------------------------------------------------------------
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