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omap4: Add smc API to read AuxCoreBoot0 register 

This patch adds a secure API to read AuxCoreBoot0 register to
check the cpu boot status. It also moves the other smc APIs
to common omap44xx-smc.S. This APIs should not be marked as
__INIT because we need these to be present for CPU hotplug

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Santosh Shilimkar 2010-08-02 13:18:18 +03:00 committed by Tony Lindgren
parent 5643aebbc0
commit 3f9eaf0984
3 changed files with 26 additions and 16 deletions
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16
arch/arm/mach-omap2/omap-headsmp.S
View File

@ -47,19 +47,3 @@ hold: ldr r12,=0x103
b secondary_startup b secondary_startup
END(omap_secondary_startup) END(omap_secondary_startup)
ENTRY(omap_modify_auxcoreboot0)
stmfd sp!, {r1-r12, lr}
ldr r12, =0x104
dsb
smc #0
ldmfd sp!, {r1-r12, pc}
END(omap_modify_auxcoreboot0)
ENTRY(omap_auxcoreboot_addr)
stmfd sp!, {r2-r12, lr}
ldr r12, =0x105
dsb
smc #0
ldmfd sp!, {r2-r12, pc}
END(omap_auxcoreboot_addr)

25
arch/arm/mach-omap2/omap44xx-smc.S
View File

@ -30,3 +30,28 @@ ENTRY(omap_smc1)
smc #0 smc #0
ldmfd sp!, {r2-r12, pc} ldmfd sp!, {r2-r12, pc}
END(omap_smc1) END(omap_smc1)
ENTRY(omap_modify_auxcoreboot0)
stmfd sp!, {r1-r12, lr}
ldr r12, =0x104
dsb
smc #0
ldmfd sp!, {r1-r12, pc}
END(omap_modify_auxcoreboot0)
ENTRY(omap_auxcoreboot_addr)
stmfd sp!, {r2-r12, lr}
ldr r12, =0x105
dsb
smc #0
ldmfd sp!, {r2-r12, pc}
END(omap_auxcoreboot_addr)
ENTRY(omap_read_auxcoreboot0)
stmfd sp!, {r2-r12, lr}
ldr r12, =0x103
dsb
smc #0
mov r0, r0, lsr #9
ldmfd sp!, {r2-r12, pc}
END(omap_read_auxcoreboot0)

1
arch/arm/plat-omap/include/plat/smp.h
View File

@ -30,6 +30,7 @@
extern void omap_secondary_startup(void); extern void omap_secondary_startup(void);
extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
extern void omap_auxcoreboot_addr(u32 cpu_addr); extern void omap_auxcoreboot_addr(u32 cpu_addr);
extern u32 omap_read_auxcoreboot0(void);
/* /*
* We use Soft IRQ1 as the IPI * We use Soft IRQ1 as the IPI