omap4: Add smc API to read AuxCoreBoot0 register
This patch adds a secure API to read AuxCoreBoot0 register to check the cpu boot status. It also moves the other smc APIs to common omap44xx-smc.S. This APIs should not be marked as __INIT because we need these to be present for CPU hotplug Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -47,19 +47,3 @@ hold: ldr r12,=0x103
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b secondary_startup
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END(omap_secondary_startup)
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ENTRY(omap_modify_auxcoreboot0)
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stmfd sp!, {r1-r12, lr}
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ldr r12, =0x104
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dsb
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smc #0
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ldmfd sp!, {r1-r12, pc}
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END(omap_modify_auxcoreboot0)
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ENTRY(omap_auxcoreboot_addr)
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stmfd sp!, {r2-r12, lr}
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ldr r12, =0x105
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dsb
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smc #0
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ldmfd sp!, {r2-r12, pc}
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END(omap_auxcoreboot_addr)
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@ -30,3 +30,28 @@ ENTRY(omap_smc1)
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smc #0
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ldmfd sp!, {r2-r12, pc}
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END(omap_smc1)
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ENTRY(omap_modify_auxcoreboot0)
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stmfd sp!, {r1-r12, lr}
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ldr r12, =0x104
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dsb
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smc #0
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ldmfd sp!, {r1-r12, pc}
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END(omap_modify_auxcoreboot0)
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ENTRY(omap_auxcoreboot_addr)
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stmfd sp!, {r2-r12, lr}
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ldr r12, =0x105
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dsb
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smc #0
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ldmfd sp!, {r2-r12, pc}
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END(omap_auxcoreboot_addr)
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ENTRY(omap_read_auxcoreboot0)
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stmfd sp!, {r2-r12, lr}
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ldr r12, =0x103
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dsb
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smc #0
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mov r0, r0, lsr #9
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ldmfd sp!, {r2-r12, pc}
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END(omap_read_auxcoreboot0)
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@ -30,6 +30,7 @@
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extern void omap_secondary_startup(void);
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extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
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extern void omap_auxcoreboot_addr(u32 cpu_addr);
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extern u32 omap_read_auxcoreboot0(void);
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/*
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* We use Soft IRQ1 as the IPI
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