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drm/amd/display: make FBC configurable option 

Currently FBC is guarded with ENABLE_FBC macro,
which needs to be manually enabled in Makefile.

This patch moves it to Kconfig so that there
wont be any need to additional patch to be carried
for enabling or disabling on every SoC.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Shirish S 2017-09-26 15:35:42 +05:30 committed by Alex Deucher
parent 9668727555
commit 3eab79163f
7 changed files with 25 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/gpu/drm/amd/display/Kconfig
View File

@ -17,6 +17,16 @@ config DRM_AMD_DC_PRE_VEGA
by default. This includes Polaris, Carrizo, Tonga, Bonaire, by default. This includes Polaris, Carrizo, Tonga, Bonaire,
and Hawaii. and Hawaii.
config DRM_AMD_DC_FBC
bool "AMD FBC - Enable Frame Buffer Compression"
depends on DRM_AMD_DC
help
Choose this option if you want to use frame buffer compression
support.
This is a power optimisation feature, check its availability
on your hardware before enabling this option.
config DRM_AMD_DC_DCN1_0 config DRM_AMD_DC_DCN1_0
bool "DCN 1.0 Raven family" bool "DCN 1.0 Raven family"
depends on DRM_AMD_DC && X86 depends on DRM_AMD_DC && X86

2
drivers/gpu/drm/amd/display/dc/core/dc.c
View File

@ -507,7 +507,7 @@ static bool construct(struct dc *dc,
dc_version = resource_parse_asic_id(init_params->asic_id); dc_version = resource_parse_asic_id(init_params->asic_id);
dc->ctx->dce_version = dc_version; dc->ctx->dce_version = dc_version;
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
dc->ctx->fbc_gpu_addr = init_params->fbc_gpu_addr; dc->ctx->fbc_gpu_addr = init_params->fbc_gpu_addr;
#endif #endif
/* Resource should construct all asic specific resources. /* Resource should construct all asic specific resources.

4
drivers/gpu/drm/amd/display/dc/dc.h
View File

@ -258,7 +258,7 @@ struct dc {
struct dm_pp_display_configuration prev_display_config; struct dm_pp_display_configuration prev_display_config;
/* FBC compressor */ /* FBC compressor */
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
struct compressor *fbc_compressor; struct compressor *fbc_compressor;
#endif #endif
}; };
@ -293,7 +293,7 @@ struct dc_init_data {
struct dc_config flags; struct dc_config flags;
uint32_t log_mask; uint32_t log_mask;
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
uint64_t fbc_gpu_addr; uint64_t fbc_gpu_addr;
#endif #endif
}; };

2
drivers/gpu/drm/amd/display/dc/dc_types.h
View File

@ -92,7 +92,7 @@ struct dc_context {
bool created_bios; bool created_bios;
struct gpio_service *gpio_service; struct gpio_service *gpio_service;
struct i2caux *i2caux; struct i2caux *i2caux;
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
uint64_t fbc_gpu_addr; uint64_t fbc_gpu_addr;
#endif #endif
}; };

2
drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
View File

@ -514,7 +514,7 @@ void dce110_compressor_construct(struct dce110_compressor *compressor,
compressor->base.lpt_channels_num = 0; compressor->base.lpt_channels_num = 0;
compressor->base.attached_inst = 0; compressor->base.attached_inst = 0;
compressor->base.is_enabled = false; compressor->base.is_enabled = false;
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
compressor->base.funcs = &dce110_compressor_funcs; compressor->base.funcs = &dce110_compressor_funcs;
#endif #endif

16
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
View File

@ -34,7 +34,7 @@
#include "dce/dce_hwseq.h" #include "dce/dce_hwseq.h"
#include "gpio_service_interface.h" #include "gpio_service_interface.h"
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
#include "dce110_compressor.h" #include "dce110_compressor.h"
#endif #endif
@ -1445,7 +1445,7 @@ static void power_down_all_hw_blocks(struct dc *dc)
power_down_clock_sources(dc); power_down_clock_sources(dc);
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
if (dc->fbc_compressor) if (dc->fbc_compressor)
dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor); dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);
#endif #endif
@ -1618,7 +1618,7 @@ static void set_static_screen_control(struct pipe_ctx **pipe_ctx,
if (events->cursor_update) if (events->cursor_update)
value |= 0x2; value |= 0x2;
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
value |= 0x84; value |= 0x84;
#endif #endif
@ -1748,7 +1748,7 @@ static void apply_min_clocks(
} }
} }
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
/* /*
* Check if FBC can be enabled * Check if FBC can be enabled
@ -1940,7 +1940,7 @@ enum dc_status dce110_apply_ctx_to_hw(
set_safe_displaymarks(&context->res_ctx, dc->res_pool); set_safe_displaymarks(&context->res_ctx, dc->res_pool);
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
if (dc->fbc_compressor) if (dc->fbc_compressor)
dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor); dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);
#endif #endif
@ -2124,7 +2124,7 @@ enum dc_status dce110_apply_ctx_to_hw(
dcb->funcs->set_scratch_critical_state(dcb, false); dcb->funcs->set_scratch_critical_state(dcb, false);
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
if (dc->fbc_compressor) if (dc->fbc_compressor)
enable_fbc(dc, context); enable_fbc(dc, context);
@ -2533,7 +2533,7 @@ static void init_hw(struct dc *dc)
abm->funcs->init_backlight(abm); abm->funcs->init_backlight(abm);
abm->funcs->abm_init(abm); abm->funcs->abm_init(abm);
} }
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
if (dc->fbc_compressor) if (dc->fbc_compressor)
dc->fbc_compressor->funcs->power_up_fbc(dc->fbc_compressor); dc->fbc_compressor->funcs->power_up_fbc(dc->fbc_compressor);
#endif #endif
@ -2781,7 +2781,7 @@ static void dce110_program_front_end_for_pipe(
program_scaler(dc, pipe_ctx); program_scaler(dc, pipe_ctx);
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
if (dc->fbc_compressor && old_pipe->stream) { if (dc->fbc_compressor && old_pipe->stream) {
if (plane_state->tiling_info.gfx8.array_mode == DC_ARRAY_LINEAR_GENERAL) if (plane_state->tiling_info.gfx8.array_mode == DC_ARRAY_LINEAR_GENERAL)
dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor); dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);

4
drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
View File

@ -52,7 +52,7 @@
#include "dce/dce_abm.h" #include "dce/dce_abm.h"
#include "dce/dce_dmcu.h" #include "dce/dce_dmcu.h"
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
#include "dce110/dce110_compressor.h" #include "dce110/dce110_compressor.h"
#endif #endif
@ -1279,7 +1279,7 @@ static bool construct(
} }
} }
#ifdef ENABLE_FBC #if defined(CONFIG_DRM_AMD_DC_FBC)
dc->fbc_compressor = dce110_compressor_create(ctx); dc->fbc_compressor = dce110_compressor_create(ctx);