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@ -1,12 +1,15 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* GPIO driver for Fintek Super-I/O F71869, F71869A, F71882, F71889 and F81866
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* GPIO driver for Fintek and Nuvoton Super-I/O chips
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*
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* Copyright (C) 2010-2013 LaCie
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*
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* Author: Simon Guinot <simon.guinot@sequanux.org>
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*/
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#define DRVNAME "gpio-f7188x"
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#define pr_fmt(fmt) DRVNAME ": " fmt
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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@ -14,30 +17,41 @@
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#include <linux/gpio/driver.h>
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#include <linux/bitops.h>
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#define DRVNAME "gpio-f7188x"
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/*
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* Super-I/O registers
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*/
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#define SIO_LDSEL 0x07 /* Logical device select */
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#define SIO_DEVID 0x20 /* Device ID (2 bytes) */
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#define SIO_DEVREV 0x22 /* Device revision */
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#define SIO_MANID 0x23 /* Fintek ID (2 bytes) */
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#define SIO_LD_GPIO 0x06 /* GPIO logical device */
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#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
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#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
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#define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
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/*
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* Fintek devices.
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*/
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#define SIO_FINTEK_DEVREV 0x22 /* Fintek Device revision */
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#define SIO_FINTEK_MANID 0x23 /* Fintek ID (2 bytes) */
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#define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
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#define SIO_F71869_ID 0x0814 /* F71869 chipset ID */
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#define SIO_F71869A_ID 0x1007 /* F71869A chipset ID */
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#define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
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#define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
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#define SIO_F71889A_ID 0x1005 /* F71889A chipset ID */
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#define SIO_F81866_ID 0x1010 /* F81866 chipset ID */
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#define SIO_F81804_ID 0x1502 /* F81804 chipset ID, same for f81966 */
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#define SIO_F81804_ID 0x1502 /* F81804 chipset ID, same for F81966 */
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#define SIO_F81865_ID 0x0704 /* F81865 chipset ID */
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#define SIO_LD_GPIO_FINTEK 0x06 /* GPIO logical device */
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/*
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* Nuvoton devices.
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*/
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#define SIO_NCT6116D_ID 0xD283 /* NCT6116D chipset ID */
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#define SIO_LD_GPIO_NUVOTON 0x07 /* GPIO logical device */
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enum chips {
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f71869,
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@ -48,6 +62,7 @@ enum chips {
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f81866,
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f81804,
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f81865,
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nct6116d,
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};
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static const char * const f7188x_names[] = {
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@ -59,10 +74,12 @@ static const char * const f7188x_names[] = {
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"f81866",
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"f81804",
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"f81865",
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"nct6116d",
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};
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struct f7188x_sio {
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int addr;
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int device;
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enum chips type;
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};
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@ -110,7 +127,7 @@ static inline int superio_enter(int base)
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{
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/* Don't step on other drivers' I/O space by accident. */
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if (!request_muxed_region(base, 2, DRVNAME)) {
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pr_err(DRVNAME "I/O address 0x%04x already in use\n", base);
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pr_err("I/O address 0x%04x already in use\n", base);
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return -EBUSY;
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}
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@ -146,10 +163,10 @@ static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
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static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
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unsigned long config);
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#define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \
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#define F7188X_GPIO_BANK(_base, _ngpio, _regbase, _label) \
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{ \
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.chip = { \
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.label = DRVNAME, \
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.label = _label, \
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.owner = THIS_MODULE, \
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.get_direction = f7188x_gpio_get_direction, \
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.direction_input = f7188x_gpio_direction_in, \
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@ -164,94 +181,108 @@ static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
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.regbase = _regbase, \
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}
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#define gpio_dir(base) (base + 0)
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#define gpio_data_out(base) (base + 1)
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#define gpio_data_in(base) (base + 2)
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#define f7188x_gpio_dir(base) ((base) + 0)
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#define f7188x_gpio_data_out(base) ((base) + 1)
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#define f7188x_gpio_data_in(base) ((base) + 2)
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/* Output mode register (0:open drain 1:push-pull). */
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#define gpio_out_mode(base) (base + 3)
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#define f7188x_gpio_out_mode(base) ((base) + 3)
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#define f7188x_gpio_dir_invert(type) ((type) == nct6116d)
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#define f7188x_gpio_data_single(type) ((type) == nct6116d)
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static struct f7188x_gpio_bank f71869_gpio_bank[] = {
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F7188X_GPIO_BANK(0, 6, 0xF0),
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F7188X_GPIO_BANK(10, 8, 0xE0),
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F7188X_GPIO_BANK(20, 8, 0xD0),
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F7188X_GPIO_BANK(30, 8, 0xC0),
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F7188X_GPIO_BANK(40, 8, 0xB0),
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F7188X_GPIO_BANK(50, 5, 0xA0),
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F7188X_GPIO_BANK(60, 6, 0x90),
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F7188X_GPIO_BANK(0, 6, 0xF0, DRVNAME "-0"),
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F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
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F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
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F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
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F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
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F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
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F7188X_GPIO_BANK(60, 6, 0x90, DRVNAME "-6"),
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};
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static struct f7188x_gpio_bank f71869a_gpio_bank[] = {
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F7188X_GPIO_BANK(0, 6, 0xF0),
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F7188X_GPIO_BANK(10, 8, 0xE0),
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F7188X_GPIO_BANK(20, 8, 0xD0),
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F7188X_GPIO_BANK(30, 8, 0xC0),
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F7188X_GPIO_BANK(40, 8, 0xB0),
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F7188X_GPIO_BANK(50, 5, 0xA0),
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F7188X_GPIO_BANK(60, 8, 0x90),
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F7188X_GPIO_BANK(70, 8, 0x80),
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F7188X_GPIO_BANK(0, 6, 0xF0, DRVNAME "-0"),
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F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
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F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
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F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
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F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
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F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
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F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
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F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
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};
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static struct f7188x_gpio_bank f71882_gpio_bank[] = {
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F7188X_GPIO_BANK(0, 8, 0xF0),
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F7188X_GPIO_BANK(10, 8, 0xE0),
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F7188X_GPIO_BANK(20, 8, 0xD0),
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F7188X_GPIO_BANK(30, 4, 0xC0),
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F7188X_GPIO_BANK(40, 4, 0xB0),
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F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
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F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
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F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
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F7188X_GPIO_BANK(30, 4, 0xC0, DRVNAME "-3"),
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F7188X_GPIO_BANK(40, 4, 0xB0, DRVNAME "-4"),
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};
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static struct f7188x_gpio_bank f71889a_gpio_bank[] = {
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F7188X_GPIO_BANK(0, 7, 0xF0),
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F7188X_GPIO_BANK(10, 7, 0xE0),
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F7188X_GPIO_BANK(20, 8, 0xD0),
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F7188X_GPIO_BANK(30, 8, 0xC0),
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F7188X_GPIO_BANK(40, 8, 0xB0),
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F7188X_GPIO_BANK(50, 5, 0xA0),
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F7188X_GPIO_BANK(60, 8, 0x90),
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F7188X_GPIO_BANK(70, 8, 0x80),
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F7188X_GPIO_BANK(0, 7, 0xF0, DRVNAME "-0"),
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F7188X_GPIO_BANK(10, 7, 0xE0, DRVNAME "-1"),
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F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
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F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
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F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
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F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
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F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
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F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
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};
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static struct f7188x_gpio_bank f71889_gpio_bank[] = {
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F7188X_GPIO_BANK(0, 7, 0xF0),
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F7188X_GPIO_BANK(10, 7, 0xE0),
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F7188X_GPIO_BANK(20, 8, 0xD0),
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F7188X_GPIO_BANK(30, 8, 0xC0),
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F7188X_GPIO_BANK(40, 8, 0xB0),
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F7188X_GPIO_BANK(50, 5, 0xA0),
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F7188X_GPIO_BANK(60, 8, 0x90),
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F7188X_GPIO_BANK(70, 8, 0x80),
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F7188X_GPIO_BANK(0, 7, 0xF0, DRVNAME "-0"),
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F7188X_GPIO_BANK(10, 7, 0xE0, DRVNAME "-1"),
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F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
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F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
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F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
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F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
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F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
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F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
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};
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static struct f7188x_gpio_bank f81866_gpio_bank[] = {
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F7188X_GPIO_BANK(0, 8, 0xF0),
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F7188X_GPIO_BANK(10, 8, 0xE0),
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F7188X_GPIO_BANK(20, 8, 0xD0),
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F7188X_GPIO_BANK(30, 8, 0xC0),
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F7188X_GPIO_BANK(40, 8, 0xB0),
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F7188X_GPIO_BANK(50, 8, 0xA0),
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F7188X_GPIO_BANK(60, 8, 0x90),
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F7188X_GPIO_BANK(70, 8, 0x80),
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F7188X_GPIO_BANK(80, 8, 0x88),
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F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
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F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
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F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
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F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
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F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
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F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-5"),
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F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
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F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
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F7188X_GPIO_BANK(80, 8, 0x88, DRVNAME "-8"),
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};
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static struct f7188x_gpio_bank f81804_gpio_bank[] = {
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F7188X_GPIO_BANK(0, 8, 0xF0),
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F7188X_GPIO_BANK(10, 8, 0xE0),
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F7188X_GPIO_BANK(20, 8, 0xD0),
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F7188X_GPIO_BANK(50, 8, 0xA0),
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F7188X_GPIO_BANK(60, 8, 0x90),
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F7188X_GPIO_BANK(70, 8, 0x80),
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F7188X_GPIO_BANK(90, 8, 0x98),
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F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
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F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
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F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
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F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-3"),
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F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-4"),
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F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-5"),
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F7188X_GPIO_BANK(90, 8, 0x98, DRVNAME "-6"),
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};
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static struct f7188x_gpio_bank f81865_gpio_bank[] = {
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F7188X_GPIO_BANK(0, 8, 0xF0),
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F7188X_GPIO_BANK(10, 8, 0xE0),
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F7188X_GPIO_BANK(20, 8, 0xD0),
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F7188X_GPIO_BANK(30, 8, 0xC0),
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F7188X_GPIO_BANK(40, 8, 0xB0),
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F7188X_GPIO_BANK(50, 8, 0xA0),
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F7188X_GPIO_BANK(60, 5, 0x90),
|
|
|
|
|
F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
|
|
|
|
|
F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
|
|
|
|
|
F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
|
|
|
|
|
F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
|
|
|
|
|
F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
|
|
|
|
|
F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-5"),
|
|
|
|
|
F7188X_GPIO_BANK(60, 5, 0x90, DRVNAME "-6"),
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct f7188x_gpio_bank nct6116d_gpio_bank[] = {
|
|
|
|
|
F7188X_GPIO_BANK(0, 8, 0xE0, DRVNAME "-0"),
|
|
|
|
|
F7188X_GPIO_BANK(10, 8, 0xE4, DRVNAME "-1"),
|
|
|
|
|
F7188X_GPIO_BANK(20, 8, 0xE8, DRVNAME "-2"),
|
|
|
|
|
F7188X_GPIO_BANK(30, 8, 0xEC, DRVNAME "-3"),
|
|
|
|
|
F7188X_GPIO_BANK(40, 8, 0xF0, DRVNAME "-4"),
|
|
|
|
|
F7188X_GPIO_BANK(50, 8, 0xF4, DRVNAME "-5"),
|
|
|
|
|
F7188X_GPIO_BANK(60, 8, 0xF8, DRVNAME "-6"),
|
|
|
|
|
F7188X_GPIO_BANK(70, 1, 0xFC, DRVNAME "-7"),
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
|
|
|
|
@ -264,13 +295,16 @@ static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
|
|
|
|
|
err = superio_enter(sio->addr);
|
|
|
|
|
if (err)
|
|
|
|
|
return err;
|
|
|
|
|
superio_select(sio->addr, SIO_LD_GPIO);
|
|
|
|
|
superio_select(sio->addr, sio->device);
|
|
|
|
|
|
|
|
|
|
dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
|
|
|
|
|
dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase));
|
|
|
|
|
|
|
|
|
|
superio_exit(sio->addr);
|
|
|
|
|
|
|
|
|
|
if (dir & 1 << offset)
|
|
|
|
|
if (f7188x_gpio_dir_invert(sio->type))
|
|
|
|
|
dir = ~dir;
|
|
|
|
|
|
|
|
|
|
if (dir & BIT(offset))
|
|
|
|
|
return GPIO_LINE_DIRECTION_OUT;
|
|
|
|
|
|
|
|
|
|
return GPIO_LINE_DIRECTION_IN;
|
|
|
|
@ -286,11 +320,15 @@ static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
|
|
|
|
|
err = superio_enter(sio->addr);
|
|
|
|
|
if (err)
|
|
|
|
|
return err;
|
|
|
|
|
superio_select(sio->addr, SIO_LD_GPIO);
|
|
|
|
|
superio_select(sio->addr, sio->device);
|
|
|
|
|
|
|
|
|
|
dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
|
|
|
|
|
dir &= ~BIT(offset);
|
|
|
|
|
superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
|
|
|
|
|
dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase));
|
|
|
|
|
|
|
|
|
|
if (f7188x_gpio_dir_invert(sio->type))
|
|
|
|
|
dir |= BIT(offset);
|
|
|
|
|
else
|
|
|
|
|
dir &= ~BIT(offset);
|
|
|
|
|
superio_outb(sio->addr, f7188x_gpio_dir(bank->regbase), dir);
|
|
|
|
|
|
|
|
|
|
superio_exit(sio->addr);
|
|
|
|
|
|
|
|
|
@ -307,14 +345,14 @@ static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset)
|
|
|
|
|
err = superio_enter(sio->addr);
|
|
|
|
|
if (err)
|
|
|
|
|
return err;
|
|
|
|
|
superio_select(sio->addr, SIO_LD_GPIO);
|
|
|
|
|
superio_select(sio->addr, sio->device);
|
|
|
|
|
|
|
|
|
|
dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
|
|
|
|
|
dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase));
|
|
|
|
|
dir = !!(dir & BIT(offset));
|
|
|
|
|
if (dir)
|
|
|
|
|
data = superio_inb(sio->addr, gpio_data_out(bank->regbase));
|
|
|
|
|
if (f7188x_gpio_data_single(sio->type) || dir)
|
|
|
|
|
data = superio_inb(sio->addr, f7188x_gpio_data_out(bank->regbase));
|
|
|
|
|
else
|
|
|
|
|
data = superio_inb(sio->addr, gpio_data_in(bank->regbase));
|
|
|
|
|
data = superio_inb(sio->addr, f7188x_gpio_data_in(bank->regbase));
|
|
|
|
|
|
|
|
|
|
superio_exit(sio->addr);
|
|
|
|
|
|
|
|
|
@ -332,18 +370,21 @@ static int f7188x_gpio_direction_out(struct gpio_chip *chip,
|
|
|
|
|
err = superio_enter(sio->addr);
|
|
|
|
|
if (err)
|
|
|
|
|
return err;
|
|
|
|
|
superio_select(sio->addr, SIO_LD_GPIO);
|
|
|
|
|
superio_select(sio->addr, sio->device);
|
|
|
|
|
|
|
|
|
|
data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
|
|
|
|
|
data_out = superio_inb(sio->addr, f7188x_gpio_data_out(bank->regbase));
|
|
|
|
|
if (value)
|
|
|
|
|
data_out |= BIT(offset);
|
|
|
|
|
else
|
|
|
|
|
data_out &= ~BIT(offset);
|
|
|
|
|
superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
|
|
|
|
|
superio_outb(sio->addr, f7188x_gpio_data_out(bank->regbase), data_out);
|
|
|
|
|
|
|
|
|
|
dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
|
|
|
|
|
dir |= BIT(offset);
|
|
|
|
|
superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
|
|
|
|
|
dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase));
|
|
|
|
|
if (f7188x_gpio_dir_invert(sio->type))
|
|
|
|
|
dir &= ~BIT(offset);
|
|
|
|
|
else
|
|
|
|
|
dir |= BIT(offset);
|
|
|
|
|
superio_outb(sio->addr, f7188x_gpio_dir(bank->regbase), dir);
|
|
|
|
|
|
|
|
|
|
superio_exit(sio->addr);
|
|
|
|
|
|
|
|
|
@ -360,14 +401,14 @@ static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
|
|
|
|
|
err = superio_enter(sio->addr);
|
|
|
|
|
if (err)
|
|
|
|
|
return;
|
|
|
|
|
superio_select(sio->addr, SIO_LD_GPIO);
|
|
|
|
|
superio_select(sio->addr, sio->device);
|
|
|
|
|
|
|
|
|
|
data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
|
|
|
|
|
data_out = superio_inb(sio->addr, f7188x_gpio_data_out(bank->regbase));
|
|
|
|
|
if (value)
|
|
|
|
|
data_out |= BIT(offset);
|
|
|
|
|
else
|
|
|
|
|
data_out &= ~BIT(offset);
|
|
|
|
|
superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
|
|
|
|
|
superio_outb(sio->addr, f7188x_gpio_data_out(bank->regbase), data_out);
|
|
|
|
|
|
|
|
|
|
superio_exit(sio->addr);
|
|
|
|
|
}
|
|
|
|
@ -388,14 +429,14 @@ static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
|
|
|
|
|
err = superio_enter(sio->addr);
|
|
|
|
|
if (err)
|
|
|
|
|
return err;
|
|
|
|
|
superio_select(sio->addr, SIO_LD_GPIO);
|
|
|
|
|
superio_select(sio->addr, sio->device);
|
|
|
|
|
|
|
|
|
|
data = superio_inb(sio->addr, gpio_out_mode(bank->regbase));
|
|
|
|
|
data = superio_inb(sio->addr, f7188x_gpio_out_mode(bank->regbase));
|
|
|
|
|
if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN)
|
|
|
|
|
data &= ~BIT(offset);
|
|
|
|
|
else
|
|
|
|
|
data |= BIT(offset);
|
|
|
|
|
superio_outb(sio->addr, gpio_out_mode(bank->regbase), data);
|
|
|
|
|
superio_outb(sio->addr, f7188x_gpio_out_mode(bank->regbase), data);
|
|
|
|
|
|
|
|
|
|
superio_exit(sio->addr);
|
|
|
|
|
return 0;
|
|
|
|
@ -449,6 +490,10 @@ static int f7188x_gpio_probe(struct platform_device *pdev)
|
|
|
|
|
data->nr_bank = ARRAY_SIZE(f81865_gpio_bank);
|
|
|
|
|
data->bank = f81865_gpio_bank;
|
|
|
|
|
break;
|
|
|
|
|
case nct6116d:
|
|
|
|
|
data->nr_bank = ARRAY_SIZE(nct6116d_gpio_bank);
|
|
|
|
|
data->bank = nct6116d_gpio_bank;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
return -ENODEV;
|
|
|
|
|
}
|
|
|
|
@ -479,18 +524,15 @@ static int __init f7188x_find(int addr, struct f7188x_sio *sio)
|
|
|
|
|
{
|
|
|
|
|
int err;
|
|
|
|
|
u16 devid;
|
|
|
|
|
u16 manid;
|
|
|
|
|
|
|
|
|
|
err = superio_enter(addr);
|
|
|
|
|
if (err)
|
|
|
|
|
return err;
|
|
|
|
|
|
|
|
|
|
err = -ENODEV;
|
|
|
|
|
devid = superio_inw(addr, SIO_MANID);
|
|
|
|
|
if (devid != SIO_FINTEK_ID) {
|
|
|
|
|
pr_debug(DRVNAME ": Not a Fintek device at 0x%08x\n", addr);
|
|
|
|
|
goto err;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
sio->device = SIO_LD_GPIO_FINTEK;
|
|
|
|
|
devid = superio_inw(addr, SIO_DEVID);
|
|
|
|
|
switch (devid) {
|
|
|
|
|
case SIO_F71869_ID:
|
|
|
|
@ -517,17 +559,30 @@ static int __init f7188x_find(int addr, struct f7188x_sio *sio)
|
|
|
|
|
case SIO_F81865_ID:
|
|
|
|
|
sio->type = f81865;
|
|
|
|
|
break;
|
|
|
|
|
case SIO_NCT6116D_ID:
|
|
|
|
|
sio->device = SIO_LD_GPIO_NUVOTON;
|
|
|
|
|
sio->type = nct6116d;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
|
|
|
|
|
pr_info("Unsupported Fintek device 0x%04x\n", devid);
|
|
|
|
|
goto err;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* double check manufacturer where possible */
|
|
|
|
|
if (sio->type != nct6116d) {
|
|
|
|
|
manid = superio_inw(addr, SIO_FINTEK_MANID);
|
|
|
|
|
if (manid != SIO_FINTEK_ID) {
|
|
|
|
|
pr_debug("Not a Fintek device at 0x%08x\n", addr);
|
|
|
|
|
goto err;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
sio->addr = addr;
|
|
|
|
|
err = 0;
|
|
|
|
|
|
|
|
|
|
pr_info(DRVNAME ": Found %s at %#x, revision %d\n",
|
|
|
|
|
f7188x_names[sio->type],
|
|
|
|
|
(unsigned int) addr,
|
|
|
|
|
(int) superio_inb(addr, SIO_DEVREV));
|
|
|
|
|
pr_info("Found %s at %#x\n", f7188x_names[sio->type], (unsigned int)addr);
|
|
|
|
|
if (sio->type != nct6116d)
|
|
|
|
|
pr_info(" revision %d\n", superio_inb(addr, SIO_FINTEK_DEVREV));
|
|
|
|
|
|
|
|
|
|
err:
|
|
|
|
|
superio_exit(addr);
|
|
|
|
@ -548,13 +603,13 @@ f7188x_gpio_device_add(const struct f7188x_sio *sio)
|
|
|
|
|
err = platform_device_add_data(f7188x_gpio_pdev,
|
|
|
|
|
sio, sizeof(*sio));
|
|
|
|
|
if (err) {
|
|
|
|
|
pr_err(DRVNAME "Platform data allocation failed\n");
|
|
|
|
|
pr_err("Platform data allocation failed\n");
|
|
|
|
|
goto err;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
err = platform_device_add(f7188x_gpio_pdev);
|
|
|
|
|
if (err) {
|
|
|
|
|
pr_err(DRVNAME "Device addition failed\n");
|
|
|
|
|
pr_err("Device addition failed\n");
|
|
|
|
|
goto err;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|