spi: spi-fsl-dspi: Enable extended SPI mode
Set the XSPI bit for devices configured for XSPI mode (currently LS1021A), and thereby switch to extended SPI mode, allowing for SPI transfers using from 4 to 32 bits per word instead of 4 to 16 bits per word. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -46,6 +46,7 @@
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#define SPI_MCR_PCSIS (0x3F << 16)
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#define SPI_MCR_CLR_TXF (1 << 11)
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#define SPI_MCR_CLR_RXF (1 << 10)
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#define SPI_MCR_XSPI (1 << 3)
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#define SPI_TCR 0x08
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#define SPI_TCR_GET_TCNT(x) (((x) & 0xffff0000) >> 16)
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@ -968,7 +969,8 @@ static const struct regmap_config dspi_xspi_regmap_config[] = {
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static void dspi_init(struct fsl_dspi *dspi)
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{
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regmap_write(dspi->regmap, SPI_MCR, SPI_MCR_MASTER | SPI_MCR_PCSIS);
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regmap_write(dspi->regmap, SPI_MCR, SPI_MCR_MASTER | SPI_MCR_PCSIS |
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(dspi->devtype_data->xspi_mode ? SPI_MCR_XSPI : 0));
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regmap_write(dspi->regmap, SPI_SR, SPI_SR_CLEAR);
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if (dspi->devtype_data->xspi_mode)
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regmap_write(dspi->regmap, SPI_CTARE(0),
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