ARM: dts: rockchip: swap timer clock-names
With the conversion of rockchip,rk-timer.yaml the clock-names order was set to "pclk", "timer", but nothing was fixed in the ARM dts section of the mainline kernel, so the swap timer clock-names that don't fit. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210828102659.7348-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -416,8 +416,8 @@
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compatible = "rockchip,rk3036-timer", "rockchip,rk3288-timer";
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reg = <0x20044000 0x20>;
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interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&xin24m>, <&cru PCLK_TIMER>;
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clock-names = "timer", "pclk";
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clocks = <&cru PCLK_TIMER>, <&xin24m>;
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clock-names = "pclk", "timer";
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};
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pwm0: pwm@20050000 {
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@ -477,8 +477,8 @@
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compatible = "rockchip,rk3228-timer", "rockchip,rk3288-timer";
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reg = <0x110c0000 0x20>;
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interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&xin24m>, <&cru PCLK_TIMER>;
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clock-names = "timer", "pclk";
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clocks = <&cru PCLK_TIMER>, <&xin24m>;
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clock-names = "pclk", "timer";
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};
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cru: clock-controller@110e0000 {
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@ -300,8 +300,8 @@
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compatible = "rockchip,rv1108-timer", "rockchip,rk3288-timer";
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reg = <0x10350000 0x20>;
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&xin24m>, <&cru PCLK_TIMER>;
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clock-names = "timer", "pclk";
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clocks = <&cru PCLK_TIMER>, <&xin24m>;
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clock-names = "pclk", "timer";
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};
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watchdog: watchdog@10360000 {
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