arm64: entry: cleanup sp_el0 manipulation
The kernel stashes the current task struct in sp_el0 so that this can be acquired consistently/cheaply when required. When we take an exception from EL0 we have to: 1) stash the original sp_el0 value 2) find the current task 3) update sp_el0 with the current task pointer Currently steps #1 and #2 occur in one place, and step #3 a while later. As the value of sp_el0 is immaterial between these points, let's move them together to make the code clearer and minimize ifdeffery. This necessitates moving the comment for MDSCR_EL1.SS. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: James Morse <james.morse@arm.com> Cc: Will Deacon <will@kernel.org> Signed-off-by: Will Deacon <will@kernel.org>
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@ -167,9 +167,13 @@ alternative_cb_end
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.if \el == 0
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clear_gp_regs
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mrs x21, sp_el0
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ldr_this_cpu tsk, __entry_task, x20 // Ensure MDSCR_EL1.SS is clear,
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ldr x19, [tsk, #TSK_TI_FLAGS] // since we can unmask debug
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disable_step_tsk x19, x20 // exceptions when scheduling.
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ldr_this_cpu tsk, __entry_task, x20
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msr sp_el0, tsk
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// Ensure MDSCR_EL1.SS is clear, since we can unmask debug exceptions
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// when scheduling.
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ldr x19, [tsk, #TSK_TI_FLAGS]
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disable_step_tsk x19, x20
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apply_ssbd 1, x22, x23
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@ -232,13 +236,6 @@ alternative_else_nop_endif
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str w21, [sp, #S_SYSCALLNO]
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.endif
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/*
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* Set sp_el0 to current thread_info.
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*/
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.if \el == 0
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msr sp_el0, tsk
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.endif
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/* Save pmr */
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alternative_if ARM64_HAS_IRQ_PRIO_MASKING
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mrs_s x20, SYS_ICC_PMR_EL1
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