net/mlx5: Add structure and defines for pci sync for fw update event
Add needed structure layouts and defines for pci sync for fw update event. The downstream patches will include event handlers for this event type. Signed-off-by: Moshe Shemesh <moshe@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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@ -364,6 +364,7 @@ enum {
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enum {
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MLX5_GENERAL_SUBTYPE_DELAY_DROP_TIMEOUT = 0x1,
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MLX5_GENERAL_SUBTYPE_PCI_POWER_CHANGE_EVENT = 0x5,
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MLX5_GENERAL_SUBTYPE_PCI_SYNC_FOR_FW_UPDATE_EVENT = 0x8,
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};
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enum {
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@ -689,6 +690,19 @@ struct mlx5_eqe_temp_warning {
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__be64 sensor_warning_lsb;
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} __packed;
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#define SYNC_RST_STATE_MASK 0xf
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enum sync_rst_state_type {
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MLX5_SYNC_RST_STATE_RESET_REQUEST = 0x0,
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MLX5_SYNC_RST_STATE_RESET_NOW = 0x1,
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MLX5_SYNC_RST_STATE_RESET_ABORT = 0x2,
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};
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struct mlx5_eqe_sync_fw_update {
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u8 reserved_at_0[3];
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u8 sync_rst_state;
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};
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union ev_data {
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__be32 raw[7];
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struct mlx5_eqe_cmd cmd;
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@ -707,6 +721,7 @@ union ev_data {
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struct mlx5_eqe_dct dct;
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struct mlx5_eqe_temp_warning temp_warning;
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struct mlx5_eqe_xrq_err xrq_err;
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struct mlx5_eqe_sync_fw_update sync_fw_update;
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} __packed;
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struct mlx5_eqe {
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@ -1317,7 +1317,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
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u8 wol_p[0x1];
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u8 stat_rate_support[0x10];
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u8 reserved_at_1f0[0xc];
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u8 reserved_at_1f0[0x1];
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u8 pci_sync_for_fw_update_event[0x1];
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u8 reserved_at_1f2[0xa];
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u8 cqe_version[0x4];
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u8 compact_address_vector[0x1];
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