net-next/hinic: Initialize api cmd hw
Update the hardware about api cmd resources and initialize it. Signed-off-by: Aviad Krawczyk <aviad.krawczyk@huawei.com> Signed-off-by: Zhao Chen <zhaochen6@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Aviad Krawczyk
David S. Miller
parent
eabf0fad81
commit
3dcea32193
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@ -13,6 +13,7 @@
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*
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/pci.h>
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@ -21,8 +22,12 @@
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#include <linux/dma-mapping.h>
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#include <linux/bitops.h>
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#include <linux/err.h>
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#include <linux/jiffies.h>
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#include <linux/delay.h>
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#include <linux/log2.h>
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#include <asm/byteorder.h>
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#include "hinic_hw_csr.h"
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#include "hinic_hw_if.h"
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#include "hinic_hw_api_cmd.h"
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@ -35,8 +40,157 @@
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(((cell_size) >= API_CMD_CELL_SIZE_MIN) ? \
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(1 << (fls(cell_size - 1))) : API_CMD_CELL_SIZE_MIN)
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#define API_CMD_CELL_SIZE_VAL(size) \
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ilog2((size) >> API_CMD_CELL_SIZE_SHIFT)
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#define API_CMD_BUF_SIZE 2048
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#define API_CMD_TIMEOUT 1000
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enum api_cmd_xor_chk_level {
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XOR_CHK_DIS = 0,
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XOR_CHK_ALL = 3,
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};
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/**
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* api_cmd_hw_restart - restart the chain in the HW
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* @chain: the API CMD specific chain to restart
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*
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* Return 0 - Success, negative - Failure
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**/
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static int api_cmd_hw_restart(struct hinic_api_cmd_chain *chain)
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{
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struct hinic_hwif *hwif = chain->hwif;
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int err = -ETIMEDOUT;
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unsigned long end;
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u32 reg_addr, val;
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/* Read Modify Write */
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reg_addr = HINIC_CSR_API_CMD_CHAIN_REQ_ADDR(chain->chain_type);
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val = hinic_hwif_read_reg(hwif, reg_addr);
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val = HINIC_API_CMD_CHAIN_REQ_CLEAR(val, RESTART);
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val |= HINIC_API_CMD_CHAIN_REQ_SET(1, RESTART);
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hinic_hwif_write_reg(hwif, reg_addr, val);
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end = jiffies + msecs_to_jiffies(API_CMD_TIMEOUT);
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do {
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val = hinic_hwif_read_reg(hwif, reg_addr);
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if (!HINIC_API_CMD_CHAIN_REQ_GET(val, RESTART)) {
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err = 0;
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break;
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}
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msleep(20);
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} while (time_before(jiffies, end));
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return err;
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}
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/**
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* api_cmd_ctrl_init - set the control register of a chain
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* @chain: the API CMD specific chain to set control register for
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**/
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static void api_cmd_ctrl_init(struct hinic_api_cmd_chain *chain)
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{
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struct hinic_hwif *hwif = chain->hwif;
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u32 addr, ctrl;
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u16 cell_size;
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/* Read Modify Write */
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addr = HINIC_CSR_API_CMD_CHAIN_CTRL_ADDR(chain->chain_type);
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cell_size = API_CMD_CELL_SIZE_VAL(chain->cell_size);
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ctrl = hinic_hwif_read_reg(hwif, addr);
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ctrl = HINIC_API_CMD_CHAIN_CTRL_CLEAR(ctrl, RESTART_WB_STAT) &
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HINIC_API_CMD_CHAIN_CTRL_CLEAR(ctrl, XOR_ERR) &
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HINIC_API_CMD_CHAIN_CTRL_CLEAR(ctrl, AEQE_EN) &
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HINIC_API_CMD_CHAIN_CTRL_CLEAR(ctrl, XOR_CHK_EN) &
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HINIC_API_CMD_CHAIN_CTRL_CLEAR(ctrl, CELL_SIZE);
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ctrl |= HINIC_API_CMD_CHAIN_CTRL_SET(1, XOR_ERR) |
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HINIC_API_CMD_CHAIN_CTRL_SET(XOR_CHK_ALL, XOR_CHK_EN) |
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HINIC_API_CMD_CHAIN_CTRL_SET(cell_size, CELL_SIZE);
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hinic_hwif_write_reg(hwif, addr, ctrl);
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}
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/**
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* api_cmd_set_status_addr - set the status address of a chain in the HW
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* @chain: the API CMD specific chain to set in HW status address for
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**/
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static void api_cmd_set_status_addr(struct hinic_api_cmd_chain *chain)
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{
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struct hinic_hwif *hwif = chain->hwif;
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u32 addr, val;
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addr = HINIC_CSR_API_CMD_STATUS_HI_ADDR(chain->chain_type);
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val = upper_32_bits(chain->wb_status_paddr);
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hinic_hwif_write_reg(hwif, addr, val);
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addr = HINIC_CSR_API_CMD_STATUS_LO_ADDR(chain->chain_type);
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val = lower_32_bits(chain->wb_status_paddr);
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hinic_hwif_write_reg(hwif, addr, val);
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}
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/**
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* api_cmd_set_num_cells - set the number cells of a chain in the HW
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* @chain: the API CMD specific chain to set in HW the number of cells for
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**/
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static void api_cmd_set_num_cells(struct hinic_api_cmd_chain *chain)
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{
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struct hinic_hwif *hwif = chain->hwif;
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u32 addr, val;
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addr = HINIC_CSR_API_CMD_CHAIN_NUM_CELLS_ADDR(chain->chain_type);
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val = chain->num_cells;
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hinic_hwif_write_reg(hwif, addr, val);
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}
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/**
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* api_cmd_head_init - set the head of a chain in the HW
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* @chain: the API CMD specific chain to set in HW the head for
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**/
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static void api_cmd_head_init(struct hinic_api_cmd_chain *chain)
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{
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struct hinic_hwif *hwif = chain->hwif;
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u32 addr, val;
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addr = HINIC_CSR_API_CMD_CHAIN_HEAD_HI_ADDR(chain->chain_type);
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val = upper_32_bits(chain->head_cell_paddr);
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hinic_hwif_write_reg(hwif, addr, val);
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addr = HINIC_CSR_API_CMD_CHAIN_HEAD_LO_ADDR(chain->chain_type);
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val = lower_32_bits(chain->head_cell_paddr);
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hinic_hwif_write_reg(hwif, addr, val);
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}
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/**
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* api_cmd_chain_hw_clean - clean the HW
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* @chain: the API CMD specific chain
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**/
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static void api_cmd_chain_hw_clean(struct hinic_api_cmd_chain *chain)
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{
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struct hinic_hwif *hwif = chain->hwif;
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u32 addr, ctrl;
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addr = HINIC_CSR_API_CMD_CHAIN_CTRL_ADDR(chain->chain_type);
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ctrl = hinic_hwif_read_reg(hwif, addr);
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ctrl = HINIC_API_CMD_CHAIN_CTRL_CLEAR(ctrl, RESTART_WB_STAT) &
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HINIC_API_CMD_CHAIN_CTRL_CLEAR(ctrl, XOR_ERR) &
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HINIC_API_CMD_CHAIN_CTRL_CLEAR(ctrl, AEQE_EN) &
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HINIC_API_CMD_CHAIN_CTRL_CLEAR(ctrl, XOR_CHK_EN) &
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HINIC_API_CMD_CHAIN_CTRL_CLEAR(ctrl, CELL_SIZE);
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hinic_hwif_write_reg(hwif, addr, ctrl);
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}
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/**
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* api_cmd_chain_hw_init - initialize the chain in the HW
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* @chain: the API CMD specific chain to initialize in HW
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@ -45,7 +199,23 @@
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**/
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static int api_cmd_chain_hw_init(struct hinic_api_cmd_chain *chain)
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{
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/* should be implemented */
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struct hinic_hwif *hwif = chain->hwif;
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struct pci_dev *pdev = hwif->pdev;
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int err;
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api_cmd_chain_hw_clean(chain);
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api_cmd_set_status_addr(chain);
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err = api_cmd_hw_restart(chain);
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if (err) {
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dev_err(&pdev->dev, "Failed to restart API CMD HW\n");
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return err;
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}
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api_cmd_ctrl_init(chain);
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api_cmd_set_num_cells(chain);
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api_cmd_head_init(chain);
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return 0;
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}
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@ -373,6 +543,7 @@ err_create_cells:
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**/
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static void api_cmd_destroy_chain(struct hinic_api_cmd_chain *chain)
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{
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api_cmd_chain_hw_clean(chain);
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api_cmd_destroy_cells(chain, chain->num_cells);
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api_chain_free(chain);
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}
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@ -20,6 +20,44 @@
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#include "hinic_hw_if.h"
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#define HINIC_API_CMD_CHAIN_REQ_RESTART_SHIFT 1
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#define HINIC_API_CMD_CHAIN_REQ_RESTART_MASK 0x1
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#define HINIC_API_CMD_CHAIN_REQ_SET(val, member) \
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(((u32)(val) & HINIC_API_CMD_CHAIN_REQ_##member##_MASK) << \
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HINIC_API_CMD_CHAIN_REQ_##member##_SHIFT)
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#define HINIC_API_CMD_CHAIN_REQ_GET(val, member) \
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(((val) >> HINIC_API_CMD_CHAIN_REQ_##member##_SHIFT) & \
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HINIC_API_CMD_CHAIN_REQ_##member##_MASK)
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#define HINIC_API_CMD_CHAIN_REQ_CLEAR(val, member) \
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((val) & (~(HINIC_API_CMD_CHAIN_REQ_##member##_MASK \
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<< HINIC_API_CMD_CHAIN_REQ_##member##_SHIFT)))
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#define HINIC_API_CMD_CHAIN_CTRL_RESTART_WB_STAT_SHIFT 1
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#define HINIC_API_CMD_CHAIN_CTRL_XOR_ERR_SHIFT 2
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#define HINIC_API_CMD_CHAIN_CTRL_AEQE_EN_SHIFT 4
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#define HINIC_API_CMD_CHAIN_CTRL_AEQ_ID_SHIFT 8
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#define HINIC_API_CMD_CHAIN_CTRL_XOR_CHK_EN_SHIFT 28
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#define HINIC_API_CMD_CHAIN_CTRL_CELL_SIZE_SHIFT 30
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#define HINIC_API_CMD_CHAIN_CTRL_RESTART_WB_STAT_MASK 0x1
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#define HINIC_API_CMD_CHAIN_CTRL_XOR_ERR_MASK 0x1
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#define HINIC_API_CMD_CHAIN_CTRL_AEQE_EN_MASK 0x1
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#define HINIC_API_CMD_CHAIN_CTRL_AEQ_ID_MASK 0x3
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#define HINIC_API_CMD_CHAIN_CTRL_XOR_CHK_EN_MASK 0x3
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#define HINIC_API_CMD_CHAIN_CTRL_CELL_SIZE_MASK 0x3
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#define HINIC_API_CMD_CHAIN_CTRL_SET(val, member) \
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(((u32)(val) & HINIC_API_CMD_CHAIN_CTRL_##member##_MASK) << \
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HINIC_API_CMD_CHAIN_CTRL_##member##_SHIFT)
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#define HINIC_API_CMD_CHAIN_CTRL_CLEAR(val, member) \
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((val) & (~(HINIC_API_CMD_CHAIN_CTRL_##member##_MASK \
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<< HINIC_API_CMD_CHAIN_CTRL_##member##_SHIFT)))
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enum hinic_api_cmd_chain_type {
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HINIC_API_CMD_WRITE_TO_MGMT_CPU = 2,
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@ -33,4 +33,30 @@
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#define HINIC_CSR_PPF_ELECTION_ADDR(idx) \
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(HINIC_ELECTION_BASE + (idx) * HINIC_PPF_ELECTION_STRIDE)
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/* API CMD registers */
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#define HINIC_CSR_API_CMD_BASE 0xF000
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#define HINIC_CSR_API_CMD_STRIDE 0x100
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#define HINIC_CSR_API_CMD_CHAIN_HEAD_HI_ADDR(idx) \
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(HINIC_CSR_API_CMD_BASE + 0x0 + (idx) * HINIC_CSR_API_CMD_STRIDE)
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#define HINIC_CSR_API_CMD_CHAIN_HEAD_LO_ADDR(idx) \
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(HINIC_CSR_API_CMD_BASE + 0x4 + (idx) * HINIC_CSR_API_CMD_STRIDE)
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#define HINIC_CSR_API_CMD_STATUS_HI_ADDR(idx) \
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(HINIC_CSR_API_CMD_BASE + 0x8 + (idx) * HINIC_CSR_API_CMD_STRIDE)
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#define HINIC_CSR_API_CMD_STATUS_LO_ADDR(idx) \
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(HINIC_CSR_API_CMD_BASE + 0xC + (idx) * HINIC_CSR_API_CMD_STRIDE)
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#define HINIC_CSR_API_CMD_CHAIN_NUM_CELLS_ADDR(idx) \
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(HINIC_CSR_API_CMD_BASE + 0x10 + (idx) * HINIC_CSR_API_CMD_STRIDE)
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#define HINIC_CSR_API_CMD_CHAIN_CTRL_ADDR(idx) \
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(HINIC_CSR_API_CMD_BASE + 0x14 + (idx) * HINIC_CSR_API_CMD_STRIDE)
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#define HINIC_CSR_API_CMD_CHAIN_REQ_ADDR(idx) \
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(HINIC_CSR_API_CMD_BASE + 0x20 + (idx) * HINIC_CSR_API_CMD_STRIDE)
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#endif
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