powerpc/fsl-booke: Add initial silicon device tree for T4240
Enable a baseline T4240 SoC to boot. There are several things missing from the device trees for T4240: * Proper PAMU topology information * DPAA related nodes (Qman, Bman, Fman, Rman, DCE) * Prefetch Manager * Thermal monitor unit * Interlaken Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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/*
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* QorIQ GPIO device tree stub [ controller @ offset 0x131000 ]
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*
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* Copyright 2013 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
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||||
*
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||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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gpio1: gpio@131000 {
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compatible = "fsl,qoriq-gpio";
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reg = <0x131000 0x1000>;
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interrupts = <54 2 0 0>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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/*
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* QorIQ GPIO device tree stub [ controller @ offset 0x132000 ]
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*
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* Copyright 2013 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
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* Foundation, either version 2 of that License or (at your option) any
|
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* later version.
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*
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||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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gpio2: gpio@132000 {
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compatible = "fsl,qoriq-gpio";
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reg = <0x132000 0x1000>;
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interrupts = <86 2 0 0>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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/*
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* QorIQ GPIO device tree stub [ controller @ offset 0x133000 ]
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*
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* Copyright 2013 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
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* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
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* later version.
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*
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||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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gpio3: gpio@133000 {
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compatible = "fsl,qoriq-gpio";
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reg = <0x133000 0x1000>;
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interrupts = <87 2 0 0>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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/*
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* T4240 Silicon/SoC Device Tree Source (post include)
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*
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* Copyright 2012 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
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* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
|
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* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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&ifc {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "fsl,ifc", "simple-bus";
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interrupts = <25 2 0 0>;
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};
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/* controller at 0x240000 */
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&pci0 {
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compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
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device_type = "pci";
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#size-cells = <2>;
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#address-cells = <3>;
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bus-range = <0x0 0xff>;
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interrupts = <20 2 0 0>;
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pcie@0 {
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <20 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 40 1 0 0
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0000 0 0 2 &mpic 1 1 0 0
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0000 0 0 3 &mpic 2 1 0 0
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0000 0 0 4 &mpic 3 1 0 0
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>;
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};
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};
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/* controller at 0x250000 */
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&pci1 {
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compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
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device_type = "pci";
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#size-cells = <2>;
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#address-cells = <3>;
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bus-range = <0 0xff>;
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interrupts = <21 2 0 0>;
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pcie@0 {
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <21 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 41 1 0 0
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0000 0 0 2 &mpic 5 1 0 0
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0000 0 0 3 &mpic 6 1 0 0
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0000 0 0 4 &mpic 7 1 0 0
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>;
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};
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};
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/* controller at 0x260000 */
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&pci2 {
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compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
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device_type = "pci";
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#size-cells = <2>;
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#address-cells = <3>;
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bus-range = <0x0 0xff>;
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interrupts = <22 2 0 0>;
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pcie@0 {
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <22 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 42 1 0 0
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0000 0 0 2 &mpic 9 1 0 0
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0000 0 0 3 &mpic 10 1 0 0
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0000 0 0 4 &mpic 11 1 0 0
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>;
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};
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};
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/* controller at 0x270000 */
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&pci3 {
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compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
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device_type = "pci";
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#size-cells = <2>;
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#address-cells = <3>;
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bus-range = <0x0 0xff>;
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interrupts = <23 2 0 0>;
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pcie@0 {
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <23 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 43 1 0 0
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0000 0 0 2 &mpic 0 1 0 0
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0000 0 0 3 &mpic 4 1 0 0
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0000 0 0 4 &mpic 8 1 0 0
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>;
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};
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};
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&rio {
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compatible = "fsl,srio";
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interrupts = <16 2 1 11>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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port1 {
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#address-cells = <2>;
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#size-cells = <2>;
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cell-index = <1>;
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};
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port2 {
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#address-cells = <2>;
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#size-cells = <2>;
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cell-index = <2>;
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};
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};
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "simple-bus";
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soc-sram-error {
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compatible = "fsl,soc-sram-error";
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interrupts = <16 2 1 29>;
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};
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corenet-law@0 {
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compatible = "fsl,corenet-law";
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reg = <0x0 0x1000>;
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fsl,num-laws = <32>;
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};
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ddr1: memory-controller@8000 {
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compatible = "fsl,qoriq-memory-controller-v4.7",
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"fsl,qoriq-memory-controller";
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reg = <0x8000 0x1000>;
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interrupts = <16 2 1 23>;
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};
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ddr2: memory-controller@9000 {
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compatible = "fsl,qoriq-memory-controller-v4.7",
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"fsl,qoriq-memory-controller";
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reg = <0x9000 0x1000>;
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interrupts = <16 2 1 22>;
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};
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ddr3: memory-controller@a000 {
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compatible = "fsl,qoriq-memory-controller-v4.7",
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"fsl,qoriq-memory-controller";
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reg = <0xa000 0x1000>;
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interrupts = <16 2 1 21>;
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};
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cpc: l3-cache-controller@10000 {
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compatible = "fsl,t4240-l3-cache-controller", "cache";
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reg = <0x10000 0x1000
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0x11000 0x1000
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0x12000 0x1000>;
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interrupts = <16 2 1 27
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16 2 1 26
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16 2 1 25>;
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};
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corenet-cf@18000 {
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compatible = "fsl,corenet-cf";
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reg = <0x18000 0x1000>;
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interrupts = <16 2 1 31>;
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fsl,ccf-num-csdids = <32>;
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fsl,ccf-num-snoopids = <32>;
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};
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iommu@20000 {
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compatible = "fsl,pamu-v1.0", "fsl,pamu";
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reg = <0x20000 0x6000>;
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interrupts = <
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24 2 0 0
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16 2 1 30>;
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};
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/include/ "qoriq-mpic.dtsi"
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guts: global-utilities@e0000 {
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compatible = "fsl,t4240-device-config";
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reg = <0xe0000 0xe00>;
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fsl,has-rstcr;
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fsl,liodn-bits = <12>;
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};
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clockgen: global-utilities@e1000 {
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compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2";
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reg = <0xe1000 0x1000>;
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};
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rcpm: global-utilities@e2000 {
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compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2";
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reg = <0xe2000 0x1000>;
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};
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sfp: sfp@e8000 {
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compatible = "fsl,t4240-sfp";
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reg = <0xe8000 0x1000>;
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};
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serdes: serdes@ea000 {
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compatible = "fsl,t4240-serdes";
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reg = <0xea000 0x4000>;
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};
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/include/ "qoriq-dma-0.dtsi"
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/include/ "qoriq-dma-1.dtsi"
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/include/ "qoriq-espi-0.dtsi"
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spi@110000 {
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fsl,espi-num-chipselects = <4>;
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};
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/include/ "qoriq-esdhc-0.dtsi"
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sdhc@114000 {
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compatible = "fsl,t4240-esdhc", "fsl,esdhc";
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sdhci,auto-cmd12;
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};
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/include/ "qoriq-i2c-0.dtsi"
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/include/ "qoriq-i2c-1.dtsi"
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/include/ "qoriq-duart-0.dtsi"
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/include/ "qoriq-duart-1.dtsi"
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/include/ "qoriq-gpio-0.dtsi"
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/include/ "qoriq-gpio-1.dtsi"
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/include/ "qoriq-gpio-2.dtsi"
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/include/ "qoriq-gpio-3.dtsi"
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/include/ "qoriq-usb2-mph-0.dtsi"
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usb0: usb@210000 {
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compatible = "fsl-usb2-mph-v2.4", "fsl-usb2-mph";
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phy_type = "utmi";
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port0;
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};
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/include/ "qoriq-usb2-dr-0.dtsi"
|
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usb1: usb@211000 {
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compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
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dr_mode = "host";
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phy_type = "utmi";
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};
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/include/ "qoriq-sata2-0.dtsi"
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/include/ "qoriq-sata2-1.dtsi"
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/include/ "qoriq-sec5.0-0.dtsi"
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L2_1: l2-cache-controller@c20000 {
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compatible = "fsl,t4240-l2-cache-controller";
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reg = <0xc20000 0x40000>;
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
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L2_2: l2-cache-controller@c60000 {
|
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compatible = "fsl,t4240-l2-cache-controller";
|
||||
reg = <0xc60000 0x40000>;
|
||||
next-level-cache = <&cpc>;
|
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};
|
||||
L2_3: l2-cache-controller@ca0000 {
|
||||
compatible = "fsl,t4240-l2-cache-controller";
|
||||
reg = <0xca0000 0x40000>;
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
|
@ -0,0 +1,127 @@
|
|||
/*
|
||||
* T4240 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "e6500_power_isa.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "fsl,T4240";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
ccsr = &soc;
|
||||
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
serial2 = &serial2;
|
||||
serial3 = &serial3;
|
||||
crypto = &crypto;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
pci3 = &pci3;
|
||||
dma0 = &dma0;
|
||||
dma1 = &dma1;
|
||||
sdhc = &sdhc;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,e6500@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0 1>;
|
||||
next-level-cache = <&L2_1>;
|
||||
};
|
||||
PowerPC,e6500@1 {
|
||||
device_type = "cpu";
|
||||
reg = <2 3>;
|
||||
next-level-cache = <&L2_1>;
|
||||
};
|
||||
PowerPC,e6500@2 {
|
||||
device_type = "cpu";
|
||||
reg = <4 5>;
|
||||
next-level-cache = <&L2_1>;
|
||||
};
|
||||
PowerPC,e6500@3 {
|
||||
device_type = "cpu";
|
||||
reg = <6 7>;
|
||||
next-level-cache = <&L2_1>;
|
||||
};
|
||||
PowerPC,e6500@4 {
|
||||
device_type = "cpu";
|
||||
reg = <8 9>;
|
||||
next-level-cache = <&L2_2>;
|
||||
};
|
||||
PowerPC,e6500@5 {
|
||||
device_type = "cpu";
|
||||
reg = <10 11>;
|
||||
next-level-cache = <&L2_2>;
|
||||
};
|
||||
PowerPC,e6500@6 {
|
||||
device_type = "cpu";
|
||||
reg = <12 13>;
|
||||
next-level-cache = <&L2_2>;
|
||||
};
|
||||
PowerPC,e6500@7 {
|
||||
device_type = "cpu";
|
||||
reg = <14 15>;
|
||||
next-level-cache = <&L2_2>;
|
||||
};
|
||||
PowerPC,e6500@8 {
|
||||
device_type = "cpu";
|
||||
reg = <16 17>;
|
||||
next-level-cache = <&L2_3>;
|
||||
};
|
||||
PowerPC,e6500@9 {
|
||||
device_type = "cpu";
|
||||
reg = <18 19>;
|
||||
next-level-cache = <&L2_3>;
|
||||
};
|
||||
PowerPC,e6500@10 {
|
||||
device_type = "cpu";
|
||||
reg = <20 21>;
|
||||
next-level-cache = <&L2_3>;
|
||||
};
|
||||
PowerPC,e6500@11 {
|
||||
device_type = "cpu";
|
||||
reg = <22 23>;
|
||||
next-level-cache = <&L2_3>;
|
||||
};
|
||||
};
|
||||
};
|
Loading…
Reference in New Issue