ARM: imx: ehci: fix host power mask bit

This patch sets HPM (Host power mask bit) to bit 16 according to i.MX
Reference Manual. Falsely it was set to bit 8, but this controls pull-up
Impedance.

Reported-by: Michael Burkey <mdburkey@gmail.com>
Cc: Stable <stable@vger.kernel.org>
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Acked-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Christoph Fritz 2012-11-16 15:39:24 +01:00 committed by Sascha Hauer
parent ecf026dc34
commit 3d5e2abe6e
2 changed files with 2 additions and 2 deletions

View File

@ -30,7 +30,7 @@
#define MX25_H1_SIC_SHIFT 21 #define MX25_H1_SIC_SHIFT 21
#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT) #define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
#define MX25_H1_PP_BIT (1 << 18) #define MX25_H1_PP_BIT (1 << 18)
#define MX25_H1_PM_BIT (1 << 8) #define MX25_H1_PM_BIT (1 << 16)
#define MX25_H1_IPPUE_UP_BIT (1 << 7) #define MX25_H1_IPPUE_UP_BIT (1 << 7)
#define MX25_H1_IPPUE_DOWN_BIT (1 << 6) #define MX25_H1_IPPUE_DOWN_BIT (1 << 6)
#define MX25_H1_TLL_BIT (1 << 5) #define MX25_H1_TLL_BIT (1 << 5)

View File

@ -30,7 +30,7 @@
#define MX35_H1_SIC_SHIFT 21 #define MX35_H1_SIC_SHIFT 21
#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT) #define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT)
#define MX35_H1_PP_BIT (1 << 18) #define MX35_H1_PP_BIT (1 << 18)
#define MX35_H1_PM_BIT (1 << 8) #define MX35_H1_PM_BIT (1 << 16)
#define MX35_H1_IPPUE_UP_BIT (1 << 7) #define MX35_H1_IPPUE_UP_BIT (1 << 7)
#define MX35_H1_IPPUE_DOWN_BIT (1 << 6) #define MX35_H1_IPPUE_DOWN_BIT (1 << 6)
#define MX35_H1_TLL_BIT (1 << 5) #define MX35_H1_TLL_BIT (1 << 5)