memory: renesas-rpc-if: Fix PHYCNT.STRTIM setting
According to the datasheets, the Strobe Timing Adjustment bit (STRTIM) setting is different on R-Car SoCs, i.e. R-Car M3 ES1.* : STRTIM[2:0] is set to 0x6 other R-Car Gen3: STRTIM[2:0] is set to 0x7 other R-Car Gen4: STRTIM[3:0] is set to 0xf To fix this issue, a DT match data was added to specify the setting for special use cases. Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> [wsa: rebased, restructured, added Gen4 support] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230419130234.44321-1-wsa+renesas@sang-engineering.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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@ -7,6 +7,7 @@
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* Copyright (C) 2019-2020 Cogent Embedded, Inc.
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*/
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/module.h>
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@ -163,6 +164,11 @@ static const struct regmap_access_table rpcif_volatile_table = {
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.n_yes_ranges = ARRAY_SIZE(rpcif_volatile_ranges),
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};
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struct rpcif_info {
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enum rpcif_type type;
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u8 strtim;
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};
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struct rpcif_priv {
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struct device *dev;
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void __iomem *base;
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@ -171,7 +177,7 @@ struct rpcif_priv {
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struct reset_control *rstc;
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struct platform_device *vdev;
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size_t size;
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enum rpcif_type type;
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const struct rpcif_info *info;
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enum rpcif_data_dir dir;
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u8 bus_size;
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u8 xfer_size;
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@ -186,6 +192,26 @@ struct rpcif_priv {
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u32 ddr; /* DRDRENR or SMDRENR */
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};
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static const struct rpcif_info rpcif_info_r8a7796 = {
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.type = RPCIF_RCAR_GEN3,
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.strtim = 6,
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};
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static const struct rpcif_info rpcif_info_gen3 = {
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.type = RPCIF_RCAR_GEN3,
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.strtim = 7,
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};
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static const struct rpcif_info rpcif_info_rz_g2l = {
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.type = RPCIF_RZ_G2L,
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.strtim = 7,
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};
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static const struct rpcif_info rpcif_info_gen4 = {
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.type = RPCIF_RCAR_GEN4,
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.strtim = 15,
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};
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/*
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* Custom accessor functions to ensure SM[RW]DR[01] are always accessed with
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* proper width. Requires rpcif_priv.xfer_size to be correctly set before!
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@ -310,7 +336,7 @@ int rpcif_hw_init(struct device *dev, bool hyperflash)
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if (ret)
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return ret;
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if (rpc->type == RPCIF_RZ_G2L) {
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if (rpc->info->type == RPCIF_RZ_G2L) {
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ret = reset_control_reset(rpc->rstc);
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if (ret)
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return ret;
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@ -324,12 +350,10 @@ int rpcif_hw_init(struct device *dev, bool hyperflash)
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/* DMA Transfer is not supported */
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regmap_update_bits(rpc->regmap, RPCIF_PHYCNT, RPCIF_PHYCNT_HS, 0);
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if (rpc->type == RPCIF_RCAR_GEN3)
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regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
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RPCIF_PHYCNT_STRTIM(7), RPCIF_PHYCNT_STRTIM(7));
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else if (rpc->type == RPCIF_RCAR_GEN4)
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regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
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RPCIF_PHYCNT_STRTIM(15), RPCIF_PHYCNT_STRTIM(15));
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regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
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/* create mask with all affected bits set */
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RPCIF_PHYCNT_STRTIM(BIT(fls(rpc->info->strtim)) - 1),
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RPCIF_PHYCNT_STRTIM(rpc->info->strtim));
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regmap_update_bits(rpc->regmap, RPCIF_PHYOFFSET1, RPCIF_PHYOFFSET1_DDRTMG(3),
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RPCIF_PHYOFFSET1_DDRTMG(3));
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@ -340,7 +364,7 @@ int rpcif_hw_init(struct device *dev, bool hyperflash)
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regmap_update_bits(rpc->regmap, RPCIF_PHYINT,
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RPCIF_PHYINT_WPVAL, 0);
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if (rpc->type == RPCIF_RZ_G2L)
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if (rpc->info->type == RPCIF_RZ_G2L)
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regmap_update_bits(rpc->regmap, RPCIF_CMNCR,
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RPCIF_CMNCR_MOIIO(3) | RPCIF_CMNCR_IOFV(3) |
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RPCIF_CMNCR_BSZ(3),
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@ -729,9 +753,9 @@ static int rpcif_probe(struct platform_device *pdev)
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rpc->dirmap = devm_ioremap_resource(dev, res);
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if (IS_ERR(rpc->dirmap))
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return PTR_ERR(rpc->dirmap);
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rpc->size = resource_size(res);
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rpc->type = (uintptr_t)of_device_get_match_data(dev);
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rpc->size = resource_size(res);
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rpc->info = of_device_get_match_data(dev);
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rpc->rstc = devm_reset_control_get_exclusive(dev, NULL);
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if (IS_ERR(rpc->rstc))
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return PTR_ERR(rpc->rstc);
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@ -764,9 +788,10 @@ static int rpcif_remove(struct platform_device *pdev)
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}
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static const struct of_device_id rpcif_of_match[] = {
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{ .compatible = "renesas,rcar-gen3-rpc-if", .data = (void *)RPCIF_RCAR_GEN3 },
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{ .compatible = "renesas,rcar-gen4-rpc-if", .data = (void *)RPCIF_RCAR_GEN4 },
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{ .compatible = "renesas,rzg2l-rpc-if", .data = (void *)RPCIF_RZ_G2L },
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{ .compatible = "renesas,r8a7796-rpc-if", .data = &rpcif_info_r8a7796 },
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{ .compatible = "renesas,rcar-gen3-rpc-if", .data = &rpcif_info_gen3 },
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{ .compatible = "renesas,rcar-gen4-rpc-if", .data = &rpcif_info_gen4 },
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{ .compatible = "renesas,rzg2l-rpc-if", .data = &rpcif_info_rz_g2l },
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{},
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};
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MODULE_DEVICE_TABLE(of, rpcif_of_match);
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