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MIPS: Sibyte: Fix M3 TLB exception handler workaround. 

The M3 workaround needs to cmpare the region and VPN2 fields only.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2010-03-23 17:56:38 +01:00
parent 5e3644a95d
commit 3d45285dd1
1 changed files with 16 additions and 6 deletions
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22
arch/mips/mm/tlbex.c
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@ -788,10 +788,15 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
* create the plain linear handler * create the plain linear handler
*/ */
if (bcm1250_m3_war()) { if (bcm1250_m3_war()) {
UASM_i_MFC0(&p, K0, C0_BADVADDR); unsigned int segbits = 44;
UASM_i_MFC0(&p, K1, C0_ENTRYHI);
uasm_i_dmfc0(&p, K0, C0_BADVADDR);
uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
uasm_i_xor(&p, K0, K0, K1); uasm_i_xor(&p, K0, K0, K1);
UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1); uasm_i_dsrl32(&p, K1, K0, 62 - 32);
uasm_i_dsrl(&p, K0, K0, 12 + 1);
uasm_i_dsll32(&p, K0, K0, 64 + 12 + 1 - segbits - 32);
uasm_i_or(&p, K0, K0, K1);
uasm_il_bnez(&p, &r, K0, label_leave); uasm_il_bnez(&p, &r, K0, label_leave);
/* No need for uasm_i_nop */ /* No need for uasm_i_nop */
} }
@ -1312,10 +1317,15 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
memset(relocs, 0, sizeof(relocs)); memset(relocs, 0, sizeof(relocs));
if (bcm1250_m3_war()) { if (bcm1250_m3_war()) {
UASM_i_MFC0(&p, K0, C0_BADVADDR); unsigned int segbits = 44;
UASM_i_MFC0(&p, K1, C0_ENTRYHI);
uasm_i_dmfc0(&p, K0, C0_BADVADDR);
uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
uasm_i_xor(&p, K0, K0, K1); uasm_i_xor(&p, K0, K0, K1);
UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1); uasm_i_dsrl32(&p, K1, K0, 62 - 32);
uasm_i_dsrl(&p, K0, K0, 12 + 1);
uasm_i_dsll32(&p, K0, K0, 64 + 12 + 1 - segbits - 32);
uasm_i_or(&p, K0, K0, K1);
uasm_il_bnez(&p, &r, K0, label_leave); uasm_il_bnez(&p, &r, K0, label_leave);
/* No need for uasm_i_nop */ /* No need for uasm_i_nop */
} }