Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull arm fixes from Russell King: "Not much here again. The two most notable things here are the sched_clock() fix, which was causing problems with the scheduling of threaded IRQs after a suspend event, and the vfp fix, which afaik has only been seen on some older OMAP boards. Nevertheless, both are fairly important fixes." * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7569/1: mm: uninitialized warning corrections ARM: 7567/1: io: avoid GCC's offsettable addressing modes for halfword accesses ARM: 7566/1: vfp: fix save and restore when running on pre-VFPv3 and CONFIG_VFPv3 set ARM: 7565/1: sched: stop sched_clock() during suspend
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commit
3cc5a2ee7f
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@ -64,7 +64,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
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static inline void __raw_writew(u16 val, volatile void __iomem *addr)
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{
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asm volatile("strh %1, %0"
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: "+Qo" (*(volatile u16 __force *)addr)
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: "+Q" (*(volatile u16 __force *)addr)
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: "r" (val));
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}
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@ -72,7 +72,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
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{
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u16 val;
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asm volatile("ldrh %1, %0"
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: "+Qo" (*(volatile u16 __force *)addr),
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: "+Q" (*(volatile u16 __force *)addr),
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"=r" (val));
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return val;
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}
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@ -10,7 +10,5 @@
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extern void sched_clock_postinit(void);
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extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
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extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
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unsigned long rate);
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#endif
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@ -27,9 +27,9 @@
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#if __LINUX_ARM_ARCH__ <= 6
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ldr \tmp, =elf_hwcap @ may not have MVFR regs
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ldr \tmp, [\tmp, #0]
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tst \tmp, #HWCAP_VFPv3D16
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ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
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addne \base, \base, #32*4 @ step over unused register space
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tst \tmp, #HWCAP_VFPD32
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ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
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addeq \base, \base, #32*4 @ step over unused register space
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#else
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VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
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and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
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@ -51,9 +51,9 @@
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#if __LINUX_ARM_ARCH__ <= 6
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ldr \tmp, =elf_hwcap @ may not have MVFR regs
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ldr \tmp, [\tmp, #0]
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tst \tmp, #HWCAP_VFPv3D16
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stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
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addne \base, \base, #32*4 @ step over unused register space
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tst \tmp, #HWCAP_VFPD32
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stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
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addeq \base, \base, #32*4 @ step over unused register space
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#else
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VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
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and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
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@ -18,11 +18,12 @@
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#define HWCAP_THUMBEE (1 << 11)
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#define HWCAP_NEON (1 << 12)
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#define HWCAP_VFPv3 (1 << 13)
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#define HWCAP_VFPv3D16 (1 << 14)
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#define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
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#define HWCAP_TLS (1 << 15)
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#define HWCAP_VFPv4 (1 << 16)
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#define HWCAP_IDIVA (1 << 17)
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#define HWCAP_IDIVT (1 << 18)
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#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
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#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
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@ -107,13 +107,6 @@ static void sched_clock_poll(unsigned long wrap_ticks)
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update_sched_clock();
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}
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void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
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unsigned long rate)
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{
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setup_sched_clock(read, bits, rate);
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cd.needs_suspend = true;
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}
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void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
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{
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unsigned long r, w;
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@ -189,18 +182,15 @@ void __init sched_clock_postinit(void)
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static int sched_clock_suspend(void)
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{
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sched_clock_poll(sched_clock_timer.data);
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if (cd.needs_suspend)
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cd.suspended = true;
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cd.suspended = true;
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return 0;
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}
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static void sched_clock_resume(void)
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{
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if (cd.needs_suspend) {
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cd.epoch_cyc = read_sched_clock();
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cd.epoch_cyc_copy = cd.epoch_cyc;
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cd.suspended = false;
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}
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cd.epoch_cyc = read_sched_clock();
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cd.epoch_cyc_copy = cd.epoch_cyc;
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cd.suspended = false;
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}
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static struct syscore_ops sched_clock_ops = {
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@ -745,7 +745,7 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs,
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static int
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do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
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{
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union offset_union offset;
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union offset_union uninitialized_var(offset);
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unsigned long instr = 0, instrptr;
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int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs);
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unsigned int type;
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@ -701,11 +701,14 @@ static int __init vfp_init(void)
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elf_hwcap |= HWCAP_VFPv3;
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/*
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* Check for VFPv3 D16. CPUs in this configuration
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* only have 16 x 64bit registers.
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* Check for VFPv3 D16 and VFPv4 D16. CPUs in
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* this configuration only have 16 x 64bit
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* registers.
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*/
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if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1)
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elf_hwcap |= HWCAP_VFPv3D16;
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elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */
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else
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elf_hwcap |= HWCAP_VFPD32;
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}
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#endif
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/*
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