ARM: 9029/1: Make iwmmxt.S support Clang's integrated assembler
This patch replaces 6 IWMMXT instructions Clang's integrated assembler does not support in iwmmxt.S using macros, while making sure GNU assembler still emit the same instructions. This should be easier than providing full IWMMXT support in Clang. This is one of the last bits of kernel code that could be compiled but not assembled with clang. Once all of it works with IAS, we no longer need to special-case 32-bit Arm in Kbuild, or turn off CONFIG_IWMMXT when build-testing. "Intel Wireless MMX Technology - Developer Guide - August, 2002" should be referenced for the encoding schemes of these extensions. Link: https://github.com/ClangBuiltLinux/linux/issues/975 Suggested-by: Nick Desaulniers <ndesaulniers@google.com> Suggested-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Tested-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Jian Cai <jiancai@google.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
This commit is contained in:
Jian Cai
Russell King
parent
4d576cab16
commit
3c9f5708b7
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@ -16,6 +16,7 @@
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#include <asm/thread_info.h>
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#include <asm/asm-offsets.h>
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#include <asm/assembler.h>
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#include "iwmmxt.h"
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#if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B)
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#define PJ4(code...) code
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@ -113,33 +114,33 @@ concan_save:
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concan_dump:
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wstrw wCSSF, [r1, #MMX_WCSSF]
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wstrw wCASF, [r1, #MMX_WCASF]
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wstrw wCGR0, [r1, #MMX_WCGR0]
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wstrw wCGR1, [r1, #MMX_WCGR1]
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wstrw wCGR2, [r1, #MMX_WCGR2]
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wstrw wCGR3, [r1, #MMX_WCGR3]
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wstrw wCSSF, r1, MMX_WCSSF
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wstrw wCASF, r1, MMX_WCASF
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wstrw wCGR0, r1, MMX_WCGR0
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wstrw wCGR1, r1, MMX_WCGR1
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wstrw wCGR2, r1, MMX_WCGR2
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wstrw wCGR3, r1, MMX_WCGR3
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1: @ MUP? wRn
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tst r2, #0x2
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beq 2f
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wstrd wR0, [r1, #MMX_WR0]
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wstrd wR1, [r1, #MMX_WR1]
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wstrd wR2, [r1, #MMX_WR2]
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wstrd wR3, [r1, #MMX_WR3]
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wstrd wR4, [r1, #MMX_WR4]
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wstrd wR5, [r1, #MMX_WR5]
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wstrd wR6, [r1, #MMX_WR6]
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wstrd wR7, [r1, #MMX_WR7]
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wstrd wR8, [r1, #MMX_WR8]
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wstrd wR9, [r1, #MMX_WR9]
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wstrd wR10, [r1, #MMX_WR10]
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wstrd wR11, [r1, #MMX_WR11]
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wstrd wR12, [r1, #MMX_WR12]
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wstrd wR13, [r1, #MMX_WR13]
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wstrd wR14, [r1, #MMX_WR14]
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wstrd wR15, [r1, #MMX_WR15]
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wstrd wR0, r1, MMX_WR0
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wstrd wR1, r1, MMX_WR1
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wstrd wR2, r1, MMX_WR2
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wstrd wR3, r1, MMX_WR3
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wstrd wR4, r1, MMX_WR4
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wstrd wR5, r1, MMX_WR5
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wstrd wR6, r1, MMX_WR6
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wstrd wR7, r1, MMX_WR7
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wstrd wR8, r1, MMX_WR8
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wstrd wR9, r1, MMX_WR9
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wstrd wR10, r1, MMX_WR10
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wstrd wR11, r1, MMX_WR11
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wstrd wR12, r1, MMX_WR12
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wstrd wR13, r1, MMX_WR13
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wstrd wR14, r1, MMX_WR14
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wstrd wR15, r1, MMX_WR15
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2: teq r0, #0 @ anything to load?
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reteq lr @ if not, return
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@ -147,30 +148,30 @@ concan_dump:
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concan_load:
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@ Load wRn
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wldrd wR0, [r0, #MMX_WR0]
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wldrd wR1, [r0, #MMX_WR1]
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wldrd wR2, [r0, #MMX_WR2]
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wldrd wR3, [r0, #MMX_WR3]
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wldrd wR4, [r0, #MMX_WR4]
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wldrd wR5, [r0, #MMX_WR5]
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wldrd wR6, [r0, #MMX_WR6]
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wldrd wR7, [r0, #MMX_WR7]
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wldrd wR8, [r0, #MMX_WR8]
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wldrd wR9, [r0, #MMX_WR9]
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wldrd wR10, [r0, #MMX_WR10]
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wldrd wR11, [r0, #MMX_WR11]
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wldrd wR12, [r0, #MMX_WR12]
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wldrd wR13, [r0, #MMX_WR13]
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wldrd wR14, [r0, #MMX_WR14]
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wldrd wR15, [r0, #MMX_WR15]
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wldrd wR0, r0, MMX_WR0
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wldrd wR1, r0, MMX_WR1
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wldrd wR2, r0, MMX_WR2
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wldrd wR3, r0, MMX_WR3
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wldrd wR4, r0, MMX_WR4
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wldrd wR5, r0, MMX_WR5
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wldrd wR6, r0, MMX_WR6
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wldrd wR7, r0, MMX_WR7
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wldrd wR8, r0, MMX_WR8
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wldrd wR9, r0, MMX_WR9
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wldrd wR10, r0, MMX_WR10
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wldrd wR11, r0, MMX_WR11
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wldrd wR12, r0, MMX_WR12
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wldrd wR13, r0, MMX_WR13
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wldrd wR14, r0, MMX_WR14
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wldrd wR15, r0, MMX_WR15
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@ Load wCx
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wldrw wCSSF, [r0, #MMX_WCSSF]
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wldrw wCASF, [r0, #MMX_WCASF]
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wldrw wCGR0, [r0, #MMX_WCGR0]
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wldrw wCGR1, [r0, #MMX_WCGR1]
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wldrw wCGR2, [r0, #MMX_WCGR2]
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wldrw wCGR3, [r0, #MMX_WCGR3]
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wldrw wCSSF, r0, MMX_WCSSF
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wldrw wCASF, r0, MMX_WCASF
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wldrw wCGR0, r0, MMX_WCGR0
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wldrw wCGR1, r0, MMX_WCGR1
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wldrw wCGR2, r0, MMX_WCGR2
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wldrw wCGR3, r0, MMX_WCGR3
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@ clear CUP/MUP (only if r1 != 0)
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teq r1, #0
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@ -0,0 +1,47 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __IWMMXT_H__
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#define __IWMMXT_H__
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.irp b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
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.set .LwR\b, \b
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.set .Lr\b, \b
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.endr
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.set .LwCSSF, 0x2
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.set .LwCASF, 0x3
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.set .LwCGR0, 0x8
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.set .LwCGR1, 0x9
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.set .LwCGR2, 0xa
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.set .LwCGR3, 0xb
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.macro wldrd, reg:req, base:req, offset:req
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.inst 0xedd00100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2)
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.endm
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.macro wldrw, reg:req, base:req, offset:req
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.inst 0xfd900100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2)
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.endm
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.macro wstrd, reg:req, base:req, offset:req
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.inst 0xedc00100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2)
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.endm
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.macro wstrw, reg:req, base:req, offset:req
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.inst 0xfd800100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2)
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.endm
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#ifdef __clang__
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#define wCon c1
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.macro tmrc, dest:req, control:req
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mrc p1, 0, \dest, \control, c0, 0
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.endm
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.macro tmcr, control:req, src:req
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mcr p1, 0, \src, \control, c0, 0
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.endm
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#endif
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#endif
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