[PATCH] bitops: mips: use generic bitops
- remove __{,test_and_}{set,clear,change}_bit() and test_bit()
- unless defined(CONFIG_CPU_MIPS32) or defined(CONFIG_CPU_MIPS64)
- remove __ffs()
- remove ffs()
- remove ffz()
- remove fls()
- remove fls64()
- remove find_{next,first}{,_zero}_bit()
- remove sched_find_first_bit()
- remove generic_hweight64()
- remove generic_hweight{32,16,8}()
- remove ext2_{set,clear,test,find_first_zero,find_next_zero}_bit()
- remove ext2_{set,clear}_bit_atomic()
- remove minix_{test,set,test_and_clear,test,find_first_zero}_bit()
Signed-off-by: Akinobu Mita <mita@miraclelinux.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Akinobu Mita
Linus Torvalds
parent
d2d7cdcf6e
commit
3c9ee7ef87
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@ -801,6 +801,14 @@ config RWSEM_GENERIC_SPINLOCK
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config RWSEM_XCHGADD_ALGORITHM
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bool
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config GENERIC_FIND_NEXT_BIT
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bool
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default y
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config GENERIC_HWEIGHT
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bool
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default y
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config GENERIC_CALIBRATE_DELAY
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bool
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default y
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@ -104,22 +104,6 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
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}
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}
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/*
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* __set_bit - Set a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* Unlike set_bit(), this function is non-atomic and may be reordered.
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* If it's called on the same region of memory simultaneously, the effect
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* may be that only one operation succeeds.
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*/
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static inline void __set_bit(unsigned long nr, volatile unsigned long * addr)
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{
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unsigned long * m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
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*m |= 1UL << (nr & SZLONG_MASK);
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}
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/*
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* clear_bit - Clears a bit in memory
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* @nr: Bit to clear
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@ -168,22 +152,6 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
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}
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}
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/*
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* __clear_bit - Clears a bit in memory
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* @nr: Bit to clear
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* @addr: Address to start counting from
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*
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* Unlike clear_bit(), this function is non-atomic and may be reordered.
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* If it's called on the same region of memory simultaneously, the effect
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* may be that only one operation succeeds.
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*/
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static inline void __clear_bit(unsigned long nr, volatile unsigned long * addr)
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{
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unsigned long * m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
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*m &= ~(1UL << (nr & SZLONG_MASK));
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}
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/*
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* change_bit - Toggle a bit in memory
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* @nr: Bit to change
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@ -234,22 +202,6 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
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}
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}
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/*
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* __change_bit - Toggle a bit in memory
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* @nr: the bit to change
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* @addr: the address to start counting from
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*
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* Unlike change_bit(), this function is non-atomic and may be reordered.
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* If it's called on the same region of memory simultaneously, the effect
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* may be that only one operation succeeds.
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*/
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static inline void __change_bit(unsigned long nr, volatile unsigned long * addr)
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{
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unsigned long * m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
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*m ^= 1UL << (nr & SZLONG_MASK);
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}
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/*
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* test_and_set_bit - Set a bit and return its old value
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* @nr: Bit to set
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@ -320,30 +272,6 @@ static inline int test_and_set_bit(unsigned long nr,
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}
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}
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/*
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* __test_and_set_bit - Set a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is non-atomic and can be reordered.
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* If two examples of this operation race, one can appear to succeed
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* but actually fail. You must protect multiple accesses with a lock.
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*/
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static inline int __test_and_set_bit(unsigned long nr,
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volatile unsigned long *addr)
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{
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volatile unsigned long *a = addr;
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unsigned long mask;
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int retval;
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a += nr >> SZLONG_LOG;
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mask = 1UL << (nr & SZLONG_MASK);
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retval = (mask & *a) != 0;
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*a |= mask;
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return retval;
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}
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/*
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* test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to clear
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@ -416,30 +344,6 @@ static inline int test_and_clear_bit(unsigned long nr,
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}
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}
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/*
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* __test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to clear
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* @addr: Address to count from
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*
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* This operation is non-atomic and can be reordered.
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* If two examples of this operation race, one can appear to succeed
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* but actually fail. You must protect multiple accesses with a lock.
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*/
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static inline int __test_and_clear_bit(unsigned long nr,
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volatile unsigned long * addr)
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{
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volatile unsigned long *a = addr;
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unsigned long mask;
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int retval;
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a += (nr >> SZLONG_LOG);
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mask = 1UL << (nr & SZLONG_MASK);
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retval = ((mask & *a) != 0);
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*a &= ~mask;
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return retval;
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}
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/*
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* test_and_change_bit - Change a bit and return its old value
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* @nr: Bit to change
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@ -509,43 +413,11 @@ static inline int test_and_change_bit(unsigned long nr,
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}
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}
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/*
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* __test_and_change_bit - Change a bit and return its old value
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* @nr: Bit to change
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* @addr: Address to count from
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*
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* This operation is non-atomic and can be reordered.
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* If two examples of this operation race, one can appear to succeed
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* but actually fail. You must protect multiple accesses with a lock.
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*/
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static inline int __test_and_change_bit(unsigned long nr,
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volatile unsigned long *addr)
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{
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volatile unsigned long *a = addr;
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unsigned long mask;
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int retval;
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a += (nr >> SZLONG_LOG);
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mask = 1UL << (nr & SZLONG_MASK);
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retval = ((mask & *a) != 0);
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*a ^= mask;
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return retval;
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}
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#undef __bi_flags
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#undef __bi_local_irq_save
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#undef __bi_local_irq_restore
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/*
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* test_bit - Determine whether a bit is set
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* @nr: bit number to test
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* @addr: Address to start counting from
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*/
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static inline int test_bit(unsigned long nr, const volatile unsigned long *addr)
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{
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return 1UL & (addr[nr >> SZLONG_LOG] >> (nr & SZLONG_MASK));
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}
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#include <asm-generic/bitops/non-atomic.h>
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/*
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* Return the bit position (0..63) of the most significant 1 bit in a word
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@ -580,6 +452,8 @@ static inline int __ilog2(unsigned long x)
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return 63 - lz;
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}
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#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
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/*
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* __ffs - find first bit in word.
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* @word: The word to search
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@ -589,31 +463,7 @@ static inline int __ilog2(unsigned long x)
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*/
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static inline unsigned long __ffs(unsigned long word)
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{
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#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
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return __ilog2(word & -word);
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#else
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int b = 0, s;
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#ifdef CONFIG_32BIT
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s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s;
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s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s;
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s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s;
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s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s;
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s = 1; if (word << 31 != 0) s = 0; b += s;
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return b;
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#endif
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#ifdef CONFIG_64BIT
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s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s;
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s = 16; if (word << 48 != 0) s = 0; b += s; word >>= s;
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s = 8; if (word << 56 != 0) s = 0; b += s; word >>= s;
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s = 4; if (word << 60 != 0) s = 0; b += s; word >>= s;
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s = 2; if (word << 62 != 0) s = 0; b += s; word >>= s;
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s = 1; if (word << 63 != 0) s = 0; b += s;
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return b;
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#endif
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#endif
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}
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/*
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@ -652,321 +502,38 @@ static inline unsigned long ffz(unsigned long word)
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*/
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static inline unsigned long fls(unsigned long word)
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{
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#ifdef CONFIG_32BIT
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#ifdef CONFIG_CPU_MIPS32
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__asm__ ("clz %0, %1" : "=r" (word) : "r" (word));
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return 32 - word;
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#else
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{
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int r = 32, s;
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if (word == 0)
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return 0;
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s = 16; if ((word & 0xffff0000)) s = 0; r -= s; word <<= s;
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s = 8; if ((word & 0xff000000)) s = 0; r -= s; word <<= s;
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s = 4; if ((word & 0xf0000000)) s = 0; r -= s; word <<= s;
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s = 2; if ((word & 0xc0000000)) s = 0; r -= s; word <<= s;
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s = 1; if ((word & 0x80000000)) s = 0; r -= s;
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return r;
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}
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#endif
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#endif /* CONFIG_32BIT */
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#ifdef CONFIG_64BIT
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#ifdef CONFIG_CPU_MIPS64
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__asm__ ("dclz %0, %1" : "=r" (word) : "r" (word));
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return 64 - word;
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#else
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{
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int r = 64, s;
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if (word == 0)
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return 0;
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s = 32; if ((word & 0xffffffff00000000UL)) s = 0; r -= s; word <<= s;
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s = 16; if ((word & 0xffff000000000000UL)) s = 0; r -= s; word <<= s;
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s = 8; if ((word & 0xff00000000000000UL)) s = 0; r -= s; word <<= s;
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s = 4; if ((word & 0xf000000000000000UL)) s = 0; r -= s; word <<= s;
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s = 2; if ((word & 0xc000000000000000UL)) s = 0; r -= s; word <<= s;
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s = 1; if ((word & 0x8000000000000000UL)) s = 0; r -= s;
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return r;
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}
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#endif
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#endif /* CONFIG_64BIT */
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}
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#define fls64(x) generic_fls64(x)
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#else
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/*
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* find_next_zero_bit - find the first zero bit in a memory region
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* @addr: The address to base the search on
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* @offset: The bitnumber to start searching at
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* @size: The maximum size to search
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*/
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static inline unsigned long find_next_zero_bit(const unsigned long *addr,
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unsigned long size, unsigned long offset)
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{
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const unsigned long *p = addr + (offset >> SZLONG_LOG);
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unsigned long result = offset & ~SZLONG_MASK;
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unsigned long tmp;
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#include <asm-generic/bitops/__ffs.h>
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#include <asm-generic/bitops/ffs.h>
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#include <asm-generic/bitops/ffz.h>
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#include <asm-generic/bitops/fls.h>
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if (offset >= size)
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return size;
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size -= result;
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offset &= SZLONG_MASK;
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if (offset) {
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tmp = *(p++);
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tmp |= ~0UL >> (_MIPS_SZLONG-offset);
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if (size < _MIPS_SZLONG)
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goto found_first;
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if (~tmp)
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goto found_middle;
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size -= _MIPS_SZLONG;
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result += _MIPS_SZLONG;
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}
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while (size & ~SZLONG_MASK) {
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if (~(tmp = *(p++)))
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goto found_middle;
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result += _MIPS_SZLONG;
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size -= _MIPS_SZLONG;
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}
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if (!size)
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return result;
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tmp = *p;
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#endif /*defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) */
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found_first:
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tmp |= ~0UL << size;
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if (tmp == ~0UL) /* Are any bits zero? */
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return result + size; /* Nope. */
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found_middle:
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return result + ffz(tmp);
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}
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#define find_first_zero_bit(addr, size) \
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find_next_zero_bit((addr), (size), 0)
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/*
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* find_next_bit - find the next set bit in a memory region
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* @addr: The address to base the search on
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* @offset: The bitnumber to start searching at
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* @size: The maximum size to search
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*/
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static inline unsigned long find_next_bit(const unsigned long *addr,
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unsigned long size, unsigned long offset)
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{
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const unsigned long *p = addr + (offset >> SZLONG_LOG);
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unsigned long result = offset & ~SZLONG_MASK;
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unsigned long tmp;
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if (offset >= size)
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return size;
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size -= result;
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offset &= SZLONG_MASK;
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if (offset) {
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tmp = *(p++);
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tmp &= ~0UL << offset;
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if (size < _MIPS_SZLONG)
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goto found_first;
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if (tmp)
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goto found_middle;
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size -= _MIPS_SZLONG;
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result += _MIPS_SZLONG;
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}
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while (size & ~SZLONG_MASK) {
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if ((tmp = *(p++)))
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goto found_middle;
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result += _MIPS_SZLONG;
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size -= _MIPS_SZLONG;
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}
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if (!size)
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return result;
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tmp = *p;
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found_first:
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tmp &= ~0UL >> (_MIPS_SZLONG - size);
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if (tmp == 0UL) /* Are any bits set? */
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return result + size; /* Nope. */
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found_middle:
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return result + __ffs(tmp);
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}
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/*
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* find_first_bit - find the first set bit in a memory region
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* @addr: The address to start the search at
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* @size: The maximum size to search
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*
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* Returns the bit-number of the first set bit, not the number of the byte
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* containing a bit.
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*/
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#define find_first_bit(addr, size) \
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find_next_bit((addr), (size), 0)
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#include <asm-generic/bitops/fls64.h>
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#include <asm-generic/bitops/find.h>
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#ifdef __KERNEL__
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/*
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* Every architecture must define this function. It's the fastest
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* way of searching a 140-bit bitmap where the first 100 bits are
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* unlikely to be set. It's guaranteed that at least one of the 140
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* bits is cleared.
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*/
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static inline int sched_find_first_bit(const unsigned long *b)
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{
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#ifdef CONFIG_32BIT
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if (unlikely(b[0]))
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return __ffs(b[0]);
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if (unlikely(b[1]))
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return __ffs(b[1]) + 32;
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if (unlikely(b[2]))
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return __ffs(b[2]) + 64;
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if (b[3])
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return __ffs(b[3]) + 96;
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return __ffs(b[4]) + 128;
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#endif
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#ifdef CONFIG_64BIT
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if (unlikely(b[0]))
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return __ffs(b[0]);
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if (unlikely(b[1]))
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return __ffs(b[1]) + 64;
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return __ffs(b[2]) + 128;
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#endif
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}
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/*
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* hweightN - returns the hamming weight of a N-bit word
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* @x: the word to weigh
|
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*
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* The Hamming Weight of a number is the total number of bits set in it.
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*/
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#define hweight64(x) generic_hweight64(x)
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#define hweight32(x) generic_hweight32(x)
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#define hweight16(x) generic_hweight16(x)
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#define hweight8(x) generic_hweight8(x)
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static inline int __test_and_set_le_bit(unsigned long nr, unsigned long *addr)
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{
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unsigned char *ADDR = (unsigned char *) addr;
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int mask, retval;
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ADDR += nr >> 3;
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mask = 1 << (nr & 0x07);
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retval = (mask & *ADDR) != 0;
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*ADDR |= mask;
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return retval;
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}
|
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static inline int __test_and_clear_le_bit(unsigned long nr, unsigned long *addr)
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{
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unsigned char *ADDR = (unsigned char *) addr;
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int mask, retval;
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|
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ADDR += nr >> 3;
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mask = 1 << (nr & 0x07);
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retval = (mask & *ADDR) != 0;
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*ADDR &= ~mask;
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return retval;
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}
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||||
static inline int test_le_bit(unsigned long nr, const unsigned long * addr)
|
||||
{
|
||||
const unsigned char *ADDR = (const unsigned char *) addr;
|
||||
int mask;
|
||||
|
||||
ADDR += nr >> 3;
|
||||
mask = 1 << (nr & 0x07);
|
||||
|
||||
return ((mask & *ADDR) != 0);
|
||||
}
|
||||
|
||||
static inline unsigned long find_next_zero_le_bit(unsigned long *addr,
|
||||
unsigned long size, unsigned long offset)
|
||||
{
|
||||
unsigned long *p = ((unsigned long *) addr) + (offset >> SZLONG_LOG);
|
||||
unsigned long result = offset & ~SZLONG_MASK;
|
||||
unsigned long tmp;
|
||||
|
||||
if (offset >= size)
|
||||
return size;
|
||||
size -= result;
|
||||
offset &= SZLONG_MASK;
|
||||
if (offset) {
|
||||
tmp = cpu_to_lelongp(p++);
|
||||
tmp |= ~0UL >> (_MIPS_SZLONG-offset); /* bug or feature ? */
|
||||
if (size < _MIPS_SZLONG)
|
||||
goto found_first;
|
||||
if (~tmp)
|
||||
goto found_middle;
|
||||
size -= _MIPS_SZLONG;
|
||||
result += _MIPS_SZLONG;
|
||||
}
|
||||
while (size & ~SZLONG_MASK) {
|
||||
if (~(tmp = cpu_to_lelongp(p++)))
|
||||
goto found_middle;
|
||||
result += _MIPS_SZLONG;
|
||||
size -= _MIPS_SZLONG;
|
||||
}
|
||||
if (!size)
|
||||
return result;
|
||||
tmp = cpu_to_lelongp(p);
|
||||
|
||||
found_first:
|
||||
tmp |= ~0UL << size;
|
||||
if (tmp == ~0UL) /* Are any bits zero? */
|
||||
return result + size; /* Nope. */
|
||||
|
||||
found_middle:
|
||||
return result + ffz(tmp);
|
||||
}
|
||||
|
||||
#define find_first_zero_le_bit(addr, size) \
|
||||
find_next_zero_le_bit((addr), (size), 0)
|
||||
|
||||
#define ext2_set_bit(nr,addr) \
|
||||
__test_and_set_le_bit((nr),(unsigned long*)addr)
|
||||
#define ext2_clear_bit(nr, addr) \
|
||||
__test_and_clear_le_bit((nr),(unsigned long*)addr)
|
||||
#define ext2_set_bit_atomic(lock, nr, addr) \
|
||||
({ \
|
||||
int ret; \
|
||||
spin_lock(lock); \
|
||||
ret = ext2_set_bit((nr), (addr)); \
|
||||
spin_unlock(lock); \
|
||||
ret; \
|
||||
})
|
||||
|
||||
#define ext2_clear_bit_atomic(lock, nr, addr) \
|
||||
({ \
|
||||
int ret; \
|
||||
spin_lock(lock); \
|
||||
ret = ext2_clear_bit((nr), (addr)); \
|
||||
spin_unlock(lock); \
|
||||
ret; \
|
||||
})
|
||||
#define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
|
||||
#define ext2_find_first_zero_bit(addr, size) \
|
||||
find_first_zero_le_bit((unsigned long*)addr, size)
|
||||
#define ext2_find_next_zero_bit(addr, size, off) \
|
||||
find_next_zero_le_bit((unsigned long*)addr, size, off)
|
||||
|
||||
/*
|
||||
* Bitmap functions for the minix filesystem.
|
||||
*
|
||||
* FIXME: These assume that Minix uses the native byte/bitorder.
|
||||
* This limits the Minix filesystem's value for data exchange very much.
|
||||
*/
|
||||
#define minix_test_and_set_bit(nr,addr) __test_and_set_bit(nr,addr)
|
||||
#define minix_set_bit(nr,addr) __set_bit(nr,addr)
|
||||
#define minix_test_and_clear_bit(nr,addr) __test_and_clear_bit(nr,addr)
|
||||
#define minix_test_bit(nr,addr) test_bit(nr,addr)
|
||||
#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
|
||||
#include <asm-generic/bitops/sched.h>
|
||||
#include <asm-generic/bitops/hweight.h>
|
||||
#include <asm-generic/bitops/ext2-non-atomic.h>
|
||||
#include <asm-generic/bitops/ext2-atomic.h>
|
||||
#include <asm-generic/bitops/minix.h>
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue